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DS90UH949A-Q1: I2C latency

Masaaki Sato
Prodigy 130 points
Part Number: DS90UH949A-Q1

Hi team,

I am trying to calculate I2C latency of below system with combination of 948/949 Ser/Des.

 

The host needs to write 2 registers (total 2byte) of microprocessor.

I2C: 400kHz

F channel PCLK: 108.26MHz

Would you please kindly tell me how to calculate latency?

Thanks

  • 0
    TI__Mastermind 28280 points

    Hi Masaaki,

    Thank you for your question. I'll need some time to look up additional information. But I will definitely post a response in 1 or 2 days.

    Best,

    Justin Phan

  • 0 in reply to Justin Phan
    Prodigy 130 points

    Hi Justin,

    Thank you for your responding

    Here is rough idea of calculation.

    I2C command structure is basically 9bit ( 7bit address + R/W + Ack, or 8bit data + Ack).

    Host will send command of 

    948 address + 949 address + micro address + register address + data = total 45bit 

    then start and stop bit should be added, so that total 47bit length.

    because host needs to write 2 registers, host send 47 bit length twice.

    In addition, back channel delay (I don't know how long) shall be added.

    Is this right?

      

  • +1 in reply to Masaaki Sato
    TI__Mastermind 28280 points

    Hi Masaaki,

    The I2C Latency depends on 4 main factors:

    1) Host I2C Bit Rate

    2) Back Channel (BC) Delay

    3) Forward Channel (FC) Delay

    4) Remote I2C Bit Rate

    You can search online and refer to these two TI documents: SNLA131 and SNLA222

    These documents describe I2C Communication over FPD-Link III. The embedded Bidirectional Control Channel (BCC) in the Ser/Des boards act as a virtual bridge between the Host controller and the Remote device. However, since the BCC buffers each data byte and regenerates the I2C protocol on the remote side, the overall I2C throughput will be reduced. Make sure the I2C Host Controller supports clock stretching, since the I2C data bits are travelling across the FC and BC at different data link speeds.

    To calculate the I2C latency from the Host to the Microcontroller, you need to divide the I2C communication into frames being sent over the FC and BC: I2C Latency (for 1 frame) = (Host_Bit_Rate * N) + (Remote_Bit_Rate * N) + FC_Delay + BC_Delay

    1) N = Number of I2C bits sent over one frame

        a) N=9 when a frame only includes a 9-bit I2C structure for data or address. N=10 when a frame also includes a START or STOP bit. 

        b) Your write command consists of 47 bits, which can be divided into 10-9-9-9-10 I2C bits in each frame.

        c) I2C Total Latency for 1st Write Command = I2C Latency(N=10) + 3*(I2C latency(N=9)) + I2C Latency(N=10).

    2) Host_Bit_Rate = Period of I2C Frequency between Host and 948 (Period = 1/400kHz = 2.5us)

    3) Remote_Bit_Rate = Period of SCL Frequency between 949 and Micro (Period = 1/(SCL frequency at Remote microcontroller) )

    4) FC_Delay = Period of the FC Frame Rate

        a) Data is sent across the FC in frames. A single FC frame consists of 35 bits containing RGB, GPIO, I2C, sync signals, etc...

        c) You need to wait for at least one frame to be sent over the FC. This is the FC delay.

        d) Best case is if the the I2C information is sent over in one frame. In the worst case, you would need to wait for 2 frames.

        e) You typically calculate for the worst case scenario.

        f) To calculate the FC frame rate, you divide your configured FC frequency by 35 bits. (Frame Rate = FC freq [bits/sec] / 35 [bits/frame])

        g) Then, you calculate the Period to get the FC_Delay (Period = 1 / (Frame Rate)). Multiply by 2 to calculate for the worst case.

    5) BC_Delay = Period of the BC Frame Rate

        a) The BC transmits data in 30-bit frames. The time it takes for one full frame to travel across the BC is the BC Delay.

        b) Normally, you need to calculate the worst case scenario, which is how long it takes for 2 frames to travel across the BC.

        c) To calculate the BC frame rate, you divide your configured BC frequency by 30 bits. (Frame Rate = BC freq [bits/sec] / 30 [bits/frame])

        d) Then, you calculate the Period to get the delay (Period = 1 / (Frame Rate)). Multiply by 2 to calculate for the worst case.

    Add these 4 parameters to get I2C latency when sending one frame of I2C information from Host to Remote Microcontroller. Do this multiple times to get the overall latency for your write command.

    Best,

    Justin Phan

  • 0 in reply to Justin Phan
    Prodigy 130 points

    Hi Justin,

    Thank you for your supporting.

    Remote I2C bitrate is same as host one. 948/949 bc frame rate is 133kHz. FC_delay should reasonably be small. (worst frame rate is 0.25*25MHz) 

    Total latency to write 1st command is roughly 250 us, so that overall latency will be 500usec, based on my calculation. 

    I noticed host needs 1bit after sending 1st I2C command prior to sending 2nd one (between stop bit and start bit), but is small enough to be ignored. 

    Thanks 

  • 0 in reply to Masaaki Sato
    Prodigy 130 points

    I have noticed wrong calculation. Total latency to write 1st command is  roughly 133 usec. Overall latency would be 270usec. 

  • 0 in reply to Masaaki Sato
    TI__Mastermind 28280 points

    Hi Masaaki,

    Just to clarify, does this mean that you measured the I2C latency in your first 47-bit write command and it measured out to be roughly 133us instead of the calculated 250us?

  • 0 in reply to Justin Phan
    Prodigy 130 points

    Hi Justin,

    133us is 117.5us (to send 47bit) + BC delay (7.5us of 133kH frame rate x2) + FC delay (frame rate of 0.25x25MHz x2) 

    I have not measured actual latency yet.

    I talked software person yesterday and 2 resistors of micro can be placed next to.

    Host can send 2 resistors value in 1 command of 56 bit length.

    Overall latency will be roughly 155us.

    Thanks,

  • 0 in reply to Masaaki Sato
    TI__Mastermind 28280 points

    Hi Masaaki,

    If you're planning on sending a write command from the Host to the remote micro, make sure to include the latency calculation from (949 -> micro) in your overall latency calculation. Most of the overall latency is from (Host->948) and (949->micro).

    Best,

    Justin Phan

  • 0 in reply to Justin Phan
    Prodigy 130 points

    Hi Justin,

    Thank you for your support.

    Looking at in detail, when host receive 1st Ack from slave, host needs to wait for (host ->948 8bit) latency + FC delay + (949-> slave 8bit) latency + Ack (slave->949 1bit) latency + BC delay + Ack 948->host 1bit) latency.   Is this correct?

    Thanks,

  • 0 in reply to Masaaki Sato
    TI__Mastermind 28280 points

    Hi Masaaki,

    Yes, your calculation is correct. In my earlier replies, I combined the ACK bit with the (host->948) and (949-> slave) latency calculation to get a simplified 9-bit I2C structure in the equation:

    (host -> 948 9-bit) + FC delay + (949 -> slave 9-bit) + BC delay = Overall I2C Latency

    But your breakdown is correct too.

    Best,

    Justin Phan

  • 0 in reply to Justin Phan
    Prodigy 130 points

    Hi Justin,

    very thanks