DS90UB954-Q1: Monitoring LOCK

Jared Becker

Genius 11845 points

Part Number: DS90UB954-Q1

Hi Team,

I am trying to understanding the best way to monitor LOCK for the 954. Can you please help with the questions below?

Below are the registers and pins I have identified for the 954 to look for LOCK/loss of LOCK. Are there any others I have missed?
Is there any way to latch a register or bit if loss of LOCK occurs?
Is there any way to configure an interrupt to the SoC if loss of LOCK occurs?

954

Thank you,

Jared

over 4 years ago

0 Justin Phan over 4 years ago

TI__Mastermind 28240 points

Hi Jared,

Thank you for the question. I'll be sure to look into this and provide a response within 1 or 2 days.

Best,

Justin Phan

0 Justin Phan over 4 years ago

TI__Mastermind 28240 points

Hi Jared,

For the UB954, you can monitor LOCK by configuring the INTB pin to trigger an active-low interrupt when a change in the LOCK status occurs. Then, you can read 0x04[2] (DEVICE_STS) to see if LOCK is currently set or not set. It is also possible to monitor the LOCK_STS_CHG bit (0x4D[4]) for interrupts that occur when the LOCK status changes and the LOCK_STS bit (0x4D[0]) for the current LOCK status.

Best,

Justin Phan

0 Jared Becker over 4 years ago in reply to Justin Phan

TI__Genius 11845 points

Hi Justin,

Thank you for the insight. Is there a way to create an interrupt to the SoC when LOCK_STS_CHG bit changes? Or is the only way to monitor this through polling?

Thank you,

Jared

0 Justin Phan over 4 years ago in reply to Jared Becker

TI__Mastermind 28240 points

Hi Jared,

You can enable interrupts on changes in LOCK status by setting the IE_LOCK_STS bit (0xD9[0]) to 1. Interrupts will be generated on changes in LOCK status. The IE_LOCK_STS bit (0xDB[0]) is the interrupt condition that is raised after the interrupt. It's cleared by reading LOCK_STS_CHG.

Best,

Justin Phan

0 Jared Becker over 4 years ago in reply to Justin Phan

TI__Genius 11845 points

Hi Justin,

Ok, so if 0xD9[0] is set to 1, and a loss of LOCK occurs, how will the interrupt be sent to the SoC? Will it be through pin 25?

-Jared

+1 Justin Phan over 4 years ago in reply to Jared Becker

TI__Mastermind 28240 points

Hi Jared,

After the Des completes its lock sequence to the input serial data, the LOCK output pin is driven HIGH. If the SoC is on the Des side, the 954 LOCK output pin can be connected directly to the SoC. You can send an interrupt through INTB/GPIO3 pin 25, but you don't need to. You can also monitor the lock registers.

Best,

Justin Phan

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DS90UB954-Q1: Monitoring LOCK