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DP83867CR: Fail to output signal for compliance test

Kazuki Itoh
Genius 10760 points
Part Number: DP83867CR

Hello team,

My customer is working on PHY compliance test, but signal is not output from ch-B.

It is found that programming to 0x0025 (output test mode to all channels) is invalid and keeps 0x0000.

What is the expected operation when it is 0x0000?

The compliance test is done with Linux launched in U-boot mode and setting it to test mode by MII command.

So, it is needed to program 0x0025 register otherwise output channel cannot be changed by test mode4 so the test is stuck.

Regards,

Itoh

  • 0
    TI__Expert 5425 points

    Hi Itoh-san,

    If the value in register 0x0025 is 0x0000, then the test mode should be driven only on Channel A.

    1. How is the customer trying to write to register 0x0025? Are they using USB2MDIO or another software? Are they seeing any errors, or is the data in register 0x0025 just not being changed?
    2. Also, according to the datasheet, bits[15:8] of register 0x0025 by default should be 0x04, not the 0x00 value that you are seeing. Can the customer double check the straps to make sure they are not strapping into some unknown mode? They can do this by comparing the strap resistor voltage to the values in registers 0x006E and 0x006F and check if they match. In addition, can they also make sure the PHY is being powered up properly according to the power-up timing diagram in the datasheet?

    Regards,

    Adrian Kam

  • 0 in reply to Adrian Kam
    TI__Genius 10760 points

    Hello Adrian-san,

    1. The customer is trying to access the register by mii command (manual input). There's no error, but the register 0x0025 and 0x01d5 doesn't change. Please find Teraterm screen shot here.

    2. Some straps are not set to desired value under configuration due to FPGA pull-up. However, I think it's OK because the address and auto-negotiation differs and not set to N/A, so it doesn't affect the compliance mode setting. 
    Please correct me if I'm wrong.

    Could the strap be the cause of the 0x0025 [15:8] not being changed?

    About the strap, the register read results were 0x006E=0x0000 and 0x006F=0x3000.

    PHY address is set to 0x1111 by the strap. Register address seems to be OK, but the register read was 0x006E=0x0000 which doesn't match.

    PHY with RGZ package is used.

    Also, I have additional questions:

    3. Could you please give me some idea to fix 1000base-T peak A and peak B fail?

    4. What happens If the strap voltage is set between MODE3 and MODE4?

    5. Is it ok to use RJ45 connector with center tap like this? Does it have any effect on the compliance test result?

    Regards,

    Itoh

  • +1 in reply to Kazuki Itoh
    TI__Expert 5425 points

    Hi Itoh-san,

    1. Registers 0x0025 and 0x01d5 are extended registers, so it requires the indirect method of accessing the extended registers. The four-step procedure is laid out in detail in Section 8.4.2.1 of the datasheet. I am not sure if the MII command you are using will utilize this four-step procedure. You might want to double-check.
    2. Even if none of them are set to N/A, you might want to double check the voltages on those strap pins to make sure they match the specs in table 4 for the mode you are strapping. Issues can still occur if the voltage on those pins are between modes. The straps should not prevent you from making register writes.
    3. If you are able get the extended registers with the correct configuration values, the 1000base-T peak A and peak B should not fail. When you have fixed the extended register issue, if you are still seeing the failure, you can reply again.
    4. As stated in item 2, if the strap voltage is between modes, it could cause the PHY to enter an unknown state and cause issues.
    5. No, the RJ45 connector you linked has the center taps shorted, which has caused compliance issues in the past. I recommend using one where the center taps are not shorted, similar to figure 31 of section 9.2.1.1 in the datasheet.

    If you are still having trouble with the straps, can you send me a schematic with the strap resistors, as well as what strap configurations the customer is trying to use? You can email me the information if it cannot be displayed in public on E2E.

    Regards,

    Adrian Kam

  • 0 in reply to Adrian Kam
    TI__Genius 10760 points

    Hello Adrian-san,

    Thank you so much, my customer succeeded to write extended registers!

    Also, Peak A and B passed.

    Do you think the extended register 0x01d5(Programmable Gain) effected to the peak voltage?

    About #5, could you please let me know which test has failed when using RJ45 with center tap shorted?

    Regards,

    Itoh 

  • +1 in reply to Kazuki Itoh
    TI__Expert 5425 points

    Hi Itoh-san,

    1. I do think that being able to configure register 0x01d5 affected the peak voltage.
    2. There really is not a specific test that failed when using RJ45 with center tap shorted. When the center taps are shorted, we have seen issues along the lines of link up failures or link up time taking too long. There could potentially be other issues that we have not encountered.

    Regards,

    Adrian Kam