TCA9617A: TCA9617A – A-Side clock loss question

GaryC said:

How does the stretching and arbitration mechanism of TCA9617A work?

You mean clock stretching? The device itself will just copy the low from one side to the other side (doesn't matter which side). It's not going to make an I2C device that doesn't support clock stretching to then support it, it simply will allow an I2C device that does clock stretch to perform that action by driving low.

Same goes for arbitration, the device itself does not perform device arbitration. It just redrives a low from either side to the other. Technically this device would make arbitration more difficult since it introduces prop delays.

GaryC said:

How many delay time at sequence (1)?

I don't think we technically have that spec'd but I believe its in the high single digit nanoseconds to low double digit nanoseconds.

GaryC said:

And why is there an offset voltage 0.5V at B side?

The device supports a bidirection signal, in order to achieve this we need to be able to prevent its own input from seeing its output. (The device's input and output are directly connected to itself). Ask yourself, what would happen if I output a low and my own input sees a low and tries to output a low to the other side? It would get stuck low forever. The 500mV offset fixes that since the input will only recognize a logic low that is lower than 400mV. So if A side sees a low, B side will drive low but its own output low (on B side) will not be seen by its own input (B side), preventing the stuck low predicament I described earlier.

further reading here:
https://www.ti.com/lit/an/scpa054/scpa054.pdf

GaryC said:

If there is signal interference at sequence (2), make the voltage drop to 0V then back to 0.5V, what effect will A side have at this time?

If you drive below 0.4V at sequence (2) then A side will be driven low by TCA9617's low side driver on A side. Once it goes back to 0.5V, the low side driver would release, though if you are at sequence (2) then technically A side should still be low. (Sequence 2 occurs when A side is driven low externally).

GaryC said:

We have find when a signal interference at sequence (2), then we will loss the A side clock. The waveform show in below.

Can you get both sides of SCLA and SCLB on the same scopeshot when this occurs?

-Bobby