• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 252 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UH948-Q1: RX_LOCK

Jared Becker
Genius 11845 points
Part Number: DS90UH948-Q1

Hi Team,

In the DUAL_RX_CTL register (0x34), bit 6 refers to "RX_LOCK asserted". Is "RX_LOCK" the same thing as the LOCK bit from register 0x1C[0]? Or is there a different register/bit that contains RX_LOCK information?

Also, if the 948 experiences a loss of lock, is there anyway for the device to latch a bit, indicating loss of lock has occurred even if it recovers?

Thank you,

Jared

  • 0
    TI__Mastermind 28480 points

    Hi Jared,

    Bit 6 in register 0x34 (RX_LOCK_MODE) is used to determine the operating conditions for which LOCK is established across RX. If RX_LOCK_MODE is set to 0, then the LOCK is only established when active video data is being received. If it is set to 1, then LOCK is set once the device is connected to a Serializer (even if active video is not being sent).  

    If the UH948 experiences a change in LOCK status, you can configure the INTB pin to trigger an active-low interrupt and then read the LOCK status in register 0x1C bit 0. This will allow you to detect if the LOCK has been changed and then find the current LOCK status. There isn't a dedicated latch register to detect if loss of LOCK has occurred.

    Best,

    Justin Phan

  • 0 in reply to Justin Phan
    TI__Genius 11845 points

    Hi Justin,

    I see, so in the description for RX_LOCK_MODE, "RX_LOCK" really just means LOCK, correct?

    For the latch question, since the 948 has a dedicated LOCK pin, if the device loses LOCK, that would act as the interrupt to the SoC, correct? Or are you saying an additional pin INTB should be configured to trigger if LOCK is lost?

    Also, since there is no bit that latches in the 948, is it possible for the device to lose LOCK, and the LOCK pin to go low, and then have the processor read 0x1C[0], and by the time the processor reads 0x1C[0], LOCK is re-established?

    Thank you,

    Jared

  • +1 in reply to Jared Becker
    TI__Mastermind 28480 points

    Hi Jared,

    Yes, the "RX_LOCK" refers to the LOCK. And the device can generate an interrupt on the INTB pin when LOCK is either lost or established. The processor needs to read the lock register at 0x1C to see if the change is from the LOCK being lost or established. The dedicated LOCK pin 1 can also be connected directly to the SoC. In this case, you don't need the UH948 to generate interrupts since the LOCK status will be fed as HIGH or LOW directly to the SoC.

    It should not be possible for the lock register bit to change before the processor has a chance to read the proper LOCK status. Before the interrupt event is cleared, the 0x1C[0] bit should not be able to be abruptly changed.

    Best,

    Justin Phan