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DS90CR288A: maximum continuous/pulsed current on the CMOS outputs for safe operations

Renan Santos Adriano
Mastermind 22240 points
Part Number: DS90CR288A

Hello Team,

My customer is looking for the maximum continuous/pulsed current on the CMOS outputs for safe operations for the DS90CR288A. Do we have this information?
Their application is they need to connect the 3.3 V CMOS outputs to a SoC with 1.2 V CMOS levels. Because of the large number of outputs, level translators seem to be infeasibly, and voltage dividers seem to be a good solution. Now they need to find a good tradeoff for the voltage divider: If the resistances are too high, less current is required but parasitic capacitances will break the signal down. So basically the question is, how low can we go on the voltage divider without damaging the IC by drawing too much current?

Regards,

Renan

  • 0
    TI__Genius 12866 points

    Hi Renan,

    The output voltage are guaranteed under these conditions in the datasheet. 

    Please look into EC table.

    LVCMOS/LVTTL DC SPECIFICATIONS

    VOH and VOL

    Best Regards,

    Charley Cai

  • 0 in reply to Charley Cai
    TI__Mastermind 22240 points

    Hello Charley,


    Good day.

    thank you for your answer. However, it is not exactly what I'm looking for.

    For the DS90CR288A, the table you refer to on page 4 of the datasheet only lists the short circuit current. It is specified as between -60 and -120 mA. I assume that this is for a single CMOS output since the IC has around 30 CMOS outputs.

    Not the question is: How long can the IC thermally withstand this short circuit current? Knowing the output impedance of the CMOS drivers would be very helpful because it would allow me to establish the thermal stress created by a specified output current.

    Or in other words: What is the combined (on all CMOS outputs) continuous output current without destroying (overheating) the device?

    Regards,

    Renan

  • 0 in reply to Renan Santos Adriano
    TI__Genius 12866 points

    From thermal perspective, you should look at the Package Derating parameter. 

    Assuming worst case operating temp of 70C and junction temp of 150C, the device can draw 992mW before reaching max junction temp. 

    The max current you pull from the all the CMOS pins should not exceed 992mW/Vcc - normal operation current consumption. The device will draw up to 135mA so this should be taken into consideration. 

    The VOH is tested under 0.4mA and VOL is tested under 2mA ,so for VOH and VOL to meet the output spec these current limit should be followed which further limits the current draw on the CMOS pins. 

    Best Regards,

    Charley Cai