DS90UB913A-Q1: What is the amplitude requirement of the clock signal input from PIN18 (GPO3/CLKIN) of DS90UB91

Amelie Zheng

Part Number: DS90UB913A-Q1

Hi Team,

What is the amplitude requirement of the clock signal input from PIN18 (GPO3/CLKIN) of DS90UB913? There is no description about it in the datasheet

According to the description in the figure below in the datasheet, the IO voltage used in our design is 2.8V, and the clock amplitude must reach 1.96V, but the 1.225V clock amplitude system still works normally in the actual test.

Could you help to this?

over 4 years ago

0 Hamzeh Jaradat over 4 years ago

TI__Guru** 108100 points

Hello Amilie,

Vih should be between 0.7Vin to Vin to guarantee it works. And Vil should be between GND and 0.3Vin to be considered as low.
If the amplitude is somewhere in between High and Low, it may work also but should not work always.

0 Baoping Gao over 4 years ago in reply to Hamzeh Jaradat

Prodigy 20 points

in Figure 16 ,when GPIO3 is using as an external clock source of the reference clock , The external oscillator clock output goes through a divide-by-2 circuit in the DS90UB913A-Q1 Serializer .In this application，Gpio3 should belong to vddpll voltage domain(1.8V)，and High Level Input Voltage is 0.65VIN=1.17V ?Is this right?

0 Hamzeh Jaradat over 4 years ago in reply to Baoping Gao

TI__Guru** 108100 points

All GPIO voltages follow the VDDIO. If you are using 2.8V VDDIO, then GPIO2 and GPIO3 are also 2.8V

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DS90UB913A-Q1: What is the amplitude requirement of the clock signal input from PIN18 (GPO3/CLKIN) of DS90UB91