• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 33 subscribers
  • Views 474 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLK2711A

Steve Parkes
Prodigy 20 points


A couple more questions:

1. When ENABLE = 0, is RXCLK held low (as during power-on reset) or tri-stated (as when LCKREFN =0)?

2. Is there any way of knowing when the TLK2711A has achieve bit-synchronisation (i.e. receive PLL locked onto data stream)?

3. Is there any way of knowing when the TLK2711A has achieve symbol-synchronisation (byte-synchronisation)?

  • 0
    TI__Expert 7850 points

    Steve,

     

    1. When ENABLE=0, RXCLK is not driven given the the device is in power down mode. The signal detect circuit seems to be the only circuit active during power down mode.

    2 & 3: There no direct way to know if bit synch or byte synch has been achieved.  One  signal to look for is the presence or absence of decode errors to signify synch state vs non-synch state.

     

    Thanks,

     

    Atul Patel

    Texas Instruments