• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 2 answers
  • Subscribers 33 subscribers
  • Views 216 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TUSB4041I: USB_VBUS

Zeming Kong
Expert 3515 points
Part Number: TUSB4041I

Hi team,

My customer is evaluating TUSB4041I, and for USB_VBUS pin, 5V power divided by 90.9kΩ（1%）、10kΩ（1%）is recommended according to datasheet.

We want to confirm if 3.3V power divided by 56.2kΩ（1%）、10kΩ（1%）is okay here?

Also, why 1% high-accuracy resistor is needed here? Only ON/OFF is monitored so we were wondering if 1% is not necesaary.

Best,

Zeming

  • +1
    TI__Guru 60870 points

    Hi Zeming,

    Yes, the resistor values can be adjusted for 3.3V.  We recommend 1% resistors so that the hub behavior doesn't vary from unit to unit.

    Regards,

    JMMN

  • 0 in reply to JMMN
    TI__Expert 3515 points

    Hi JMMN,

    Thanks for your answer. Could you tell me the threshold value of USB_VBUS? Which is used to judge ON/OFF of VBUS.

    Additionally, could you explain the power up sequence of VDD, VDD33 and GRSTz?

    I see the datasheet, 7.6 Power-Up Timing Requirements and 8.3.7 Power-Up and Reset sections have different descriptions, it is really confusing. 

    Best,

    Zeming

  • +1 in reply to Zeming Kong
    TI__Guru 60870 points

    Hi Zeming,

    The USB_VBUS Vih(min) is around 400 mV, but I would recommend that the customer target USB_VBUS = 500 mV when VBUS is on to prevent any issues due to supply noise or IR drop.

    There is a requirement (note [1] ) in the datasheet specifying VDD33 to ramp after VDD11 if a passive reset circuit is used.  This requirement is meant to prevent the case where a customer ramps 3.3V before 1.1V and the internal pullup on GRSTz to 3.3V rises allowing the passive reset to complete before the 1.1V rail even powers on, leading to an invalid reset.  In practical application, most implementations have 3.3V and 1.1V ramp simultaneously (or within us) and include a large enough cap on the passive reset circuit pin to allow for reset to be held low for the required time after the power rails are stable. This is the case on the evaluation modules.   The capacitor on the GRSTz pin will vary depending on the ramp times in the platform.  1 uF is acceptable for many applications, 2.2 uF would give more margin if they have slower ramp times.

    If there is an active reset circuit in the design, which would not rely on the internal pullup resistor on GRSTz, then power rail sequencing does not matter.

    Regards,

    JMMN

  • 0 in reply to JMMN
    TI__Expert 3515 points

    Hi JMMN,

    Thanks a lot for your support.

    And I think there will be many other questions from the customer containing confidential information, please let me contact via email directly.

    Best,

    Zeming