This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCA9306: PCA9306 in switch configuration while Vref1 = Vref2

Part Number: PCA9306
Other Parts Discussed in Thread: SN74LVC2G66

Hi,

We would like to have a design with several devices on the same I2C buses. those devices might be powered by either 3.3V standby power or 3.3V normal power.

To avoid voltage conflict and current leakage, we would like to put PCA9306 as a buffer.

Since both voltage levels are 3.3 volt,  we follow Figure 10 in the datasheet. In this figure, the EN pin is controlled by GPIO(we would like to connect it to normal power good)

We notice it claim "GPIO: high logic does not exceed Vref2 + Vth". However, in 9.2.1, the EN is required no less than Vref1 + Vth.

Looks these two statements are in conflict when Vref1 = Vref2. Do you have any suggestions? thanks 

Best,

KC