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DS90UB933-Q1: some questions about UB933

Jiawei Hu1
Expert 5765 points
Part Number: DS90UB933-Q1
Other Parts Discussed in Thread: TDA2SX

Hi team,

1. How to apply the 0x27[3] & 0x27[5] of the register? Does the timing of PDB and GPIO2 satisfy the need to set this register?
Are there any documentation on PDB and GPIO2 issues; and precautions;

2. GPIO2 and GPIO3 of DS90DB933 are used as clock input and output pins;
What is the difference between the reference external clock and the internal PLL in the application? We now plan two options as follows:
①1920(H)*720(V)*30pfs*1.15(blanking)*2 (one pixel occupies two bytes)=95.4MHZ
②1920(H)*720(V)*28pfs*1.1(blanking)*2 (one pixel occupies two bytes)=85MHZ
When the PICLK reaches what level, TI recommends using an external crystal oscillator?

3. Can you provide us with the register configuration file of DS90DB933?
SOC: TDA2SX, video resolution: 1920*720*28pfs, format YUV422;

4. Is the arrangement of C(AC_N)+50ohm close to the Serdes end or does it need to be coupled to the Fakra connector end in parallel with the LVDS+ trace?

5. Are there any differences between FPD-LINKIII and FPD-LINK V for the above layout?

  • 0
    TI__Mastermind 18755 points

    Hello,

    1. The writing of register 0x27 is related to the timing of VDDn to PDB, and not related to PDB to GPIO2.  It is explained in section 8.1.2 in the datasheet.

    2. The 933 has an internal Always-On clock in the case that an external clock source is not available.  Typically the 933 runs in external oscillator mode or PCLK mode where it derives a clock from an external oscillator or from the imagers PCLK.  There is not a specific frequency when one mode is desirable over the other but it is important to make sure that the PCLK falls within the specified range.

    3.  YUV422 can be 8-bit or 10-bit so you can use either an external clock or the PCLK from the imager but if you use an external clock then you will need to make sure you use appropriate timing described in section 7.4.1.  You will also need to set the mode of the deserializer appropriately as well.

    4. The capacitor should be placed near the device but the trace should be terminated through a 50ohm resistor near the connector.

    5. The layout will be similar however there may be different values of AC caps depending on speed and operating mode.  The appropriate values are described in table 8-2 of the 933 datasheet.

    Regards,

    Nick