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TUSB564: Register programming steps

Part Number: TUSB564


Hi,

We would configure TUSB564 from PD controller IC using I2C mode, and have some questions as below.

  1. Should we write EQ_OVERRIDE bit to '1' before or after we configure EQ setting in 0x10/0x11/0x20/0x21?  Or it doesn't matter how the order is here?
  2. Do always need to keep 0x0A register configured as 0x10 when nothing is connected to the type-c port?
  3. In addition to 0x0A/0x10/0x11/0x20/0x21, is there any other register we must configure under I2C mode?

Thanks,

Antony

  • Antony

    1. Should we write EQ_OVERRIDE bit to '1' before or after we configure EQ setting in 0x10/0x11/0x20/0x21?  Or it doesn't matter how the order is here?
      1. Yes, you should write EQ_OVERRIDE bit first and then apply the EQ setting.
    2. Do always need to keep 0x0A register configured as 0x10 when nothing is connected to the type-c port?
      1. Yes
    3. In addition to 0x0A/0x10/0x11/0x20/0x21, is there any other register we must configure under I2C mode?
      1. Write 0x80 to register 0x13 is another potential step when debugging the DP Alt Mode over Type-C. The value of 0x80 will disable AUX snoop and enable all four DP lanes.

    Thanks

    David

  • Hi David,

    If we configure the chip with the steps below, will EQ setting (0x10/0x11/0x20/0x21) be reset after step3?  Do we need to configure EQ setting again after step3?

    • Step1:write EQ_OVERRIDE  bit to '1' in the beginning by configure 0x0A register to 0x10
    • Step2: Configure EQ setting as we need in 0x10/0x11/0x20/0x21
    • Step3: There's a type-c device plugged in and we configure 0x0A register as 0x13.

    Thanks,

    Antony

  • Antony

    For steps, please refer to this app note from the PI team, https://www.ti.com/lit/an/slva844b/slva844b.pdf.

    The registers will not be cleared after step #3.

    Thanks

    David