Other Parts Discussed in Thread: SN65LV1023A
Hi all
My customer has an application as illustrated in the below schematic where they are transferring data and an independent clock at 60MHz over a serial interface.
They might implement this with a ser-des like the SCAN921224, however these devices have a lower data rate limit of 100Mbps as they will multiply the clock (e.g. 10MHz) by a factor of 10.
Do we have a device that can support lower data rate ?
Or do we have a PLL that can be used as the block indicated with "?" and that could regenerate the clock from the data stream ?
Best regards
Ueli