Other Parts Discussed in Thread: SN65DSI84
Hi Team,
We would like to check whether SN65DSI84-Q1 could support 1080(H)*1920(V)/60Hz in LVDS dual link mode. I think limitation is from PCLK rather than H/V value, is it correct?
In addition, in order to make PCB routing smooth (Odd and Even channel cross each other with SN65DSI84 default setting), is setting EVEN_ODD_SWAP to “1” a way to swap odd and event channels? Please let me know if there is anything I need to pay attention. (0x1A register)
Roy
