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TUSB542: USB compliance test

Takashi Yamaguchi
Genius 13380 points
Part Number: TUSB542

Hi team,

I received the following questions from my customer. Could you please help with the questions?

[Background]

In the product under consideration using TUSB542 (product configuration: USB host IC - TUSB542 - USB-A pin), the following discrepancy occurred between the USB compliance test results and actual operation when examining the CNFG pin settings.
　　- USB SS compliance test (Receiver Jitter Tolerance Test at 5 GT/s)
Setting A: DE_AP=3.5/OS_AP=0.9/EQ_Conn=6 -->There is a large variation in the test result, and it may pass after several times.
Setting B: DE_AP=0/OS_AP=0.9/EQ_Conn=0 -->The test cannot be performed in the first place because it leaves the loopback mode.
                   -->It has been confirmed that the settings on the TX side (EQ_AP/DE_Conn/OS_Conn) are the same and there is no problem in the compliance test.

For details of the test, see section TD.1.8 of the following document."https://usb.org/sites/default/files/EnhancedSuperSpeedPHYComplianceTestSpec.pdf"

Communication operation with iperf3 application using USB-LAN adapter from ELECOM
　　　(Connection configuration: Prototype USB-A terminal - USB-LAN adapter - LAN cable - Opposite PC)
Setting A: DE_AP=3.5/OS_AP=0.9/EQ_Conn=6 => Normal communication is possible
Setting B: DE_AP=0/OS_AP=0.9/EQ_Conn=0 => Communication is cut off in a few seconds.

[Questions]

1. When using this IC, have you confirmed any problems with the Receiver Jitter Tolerance Test described above?

2. I have checked the datasheet of this IC, and there is a function called Automatic LFPS Detection, but does this function work with the Receiver Jitter Tolerance Test described above, and is there possibility that the de-emphasis does not work? Specifically, at what timing will de-emphasis be effective again after de-emphasis is disabled in "5. Transmit 400 Polling.LFPS (4ms)." In Section TD.1.8 of the above document. I'm curious.

3. Please let us know if there are any other functions in the specifications of this IC that may affect the Receiver Jitter Tolerance Test or may cause variations in the jitter tolerance of the RX side.

Regards,

Yamaguchi