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ADC12D500RF: Application inquiry

Part Number: ADC12D500RF

Hello Team,

My customer is using the ADC12D500RF and they want to confirm for the clock system is it possible to use HMC7044 for clock input?

About length matching of lvds di and dq, how it is categorized for matching length? They want to use DESIQ mode.They need to know the length matching per port(12bit) or no all data-I or data-Q must matching the length for example per 12bit port matching length is ok or no? They want to match all DQ and all DI together on PCB.

Regards,
Renan

  • Hi Renan,

    Yes, the customer can use the HMC7044, this clock chip has many output levels configurations that will work. I would use the PECL config, on high output. This will provide the best jitter performance. Please make sure they AC couple the clock input pins of the ADC.

    On the length matching, they should length match between all the I and Q data lines. 1cm or less is fine.

    Regards,

    Rob