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DP83TD510E: Loopback over twisted pair breaksdown after time

Part Number: DP83TD510E

Hello,

I am having issues getting a proper link over Single Pair Ethernet with the Ti EVM-Board and our own design.

The current setup is:

- Laptop connected over LAN-Cable to the DP83TD510E-EVM Board

- Twisted pair of copper (~10cm) connected to the EVM-Board and our own Board. Our own Board features also a DP83TD510E, with a 50Mhz oszillator.

- The DP83TD510E on our Board is then set to "Reverse Loopback" (Register 0016 set to 0110) to send the received data back over SPE to the EVM-Board.

- With a packet generator on the laptop we send dummy UDP packets with a frequency of 32Hz to the EVM-Board.

- On the same Laptop a packet sniffer is recording all in- and outgoing packets.

In the first ~400-500 seconds the loopback works flawlessly. But for no reason, after a sertain time no more incoming packets are recorded. The duration of the loopback working is approx. always the same. In the picture below you can see ~64Hz in- & outgoing packet rate, and after the breakdown it drops to 32Hz, which means no more packets are received.

When the loopback is working properly, the RXD0 and RXD1 signals on the EVM-Board of the DP83TD510E look very consistent. When the loopback breaksdown the RXD0 and RXD1 signals tend to be not consistent at all. In the picture below is a example of the signal after loopback breakdown, looks like a part of the packet is missing.

When the loopback stopped working following registers in the DP83TD510E on our own Board are changing: 

- 0x15 (RX error count) increases

- 0x17 [2] RMII fifo underflow flag changes to 1

- 0x12D Tx packet error increases

- 0x130 Rx packet error increases

 

Does anyone have an idea what could be the problem with this setup? Are we missing something?

If any informations are missing, let me know.

Thank you very much!

Kind regards,

Moritz

  • Hello Moritz

    Thank you for the query.

    Couple of questions on the board that you have designed - has the board been reviewed by TI previously. If not, have you  reference the TI EVM while designing the custom board.

    For your understanding before, have you done any loopback testing using only the EVM board ?

    As you answer the query, we will continue to analyze the data provided by you.

    Regards,

    Sreenivasa 

  • Hello Sreenivasa,

    till now, the design has not been reviewed by Ti. But we designed the board with the Ti EVM as reference, which helped us alot.

    I made some loopback tests just with the EVM board. They all worked fine. The analog loopback (register 0x15 set to 0x108) on the EVM worked fine, as you can see in the picture below (same Datarate as above, expectet packet rate is 64Hz):

    Kind regards,

    Moritz

  • Hello Mortiz, 

    Thank for doing tests on the EVM.

    What is the setup you are using to do the loopback? What tools do you use to generate the packet etc.

    Have you tested this on multiple boards to isolate any components related issue and should we do a schematics review before we analyze other possibilities?

    Regards,

    Sreenivasa

  • Hello Sreenivasa,

    the packets are generated using the programm called packetsender from packetsender.com . With the build-in UDP traffic generator it generates packets with a frequency of 32Hz, i figured out that the breakdown does not depend on the packet-frequency.

    The DP83TD510E on our board is set to reverse loopback to return all received data back over SPE to the Ti-EVM. Packets received from the laptop are logged with wireshark.

    We build two of them. The other board seems to breakdown earlier (after ~150s of working good) than the other.

    Regarding the analog frontend we went with the solution from Würth: https://www.we-online.com/web/en/electronic_components/produkte_pb/produktinnovationen/mlcc_1.php

    If you can have a look on our schematics we would appreciate that. Let me know how we can arrange that!

    Kind regards,

    Moritz

  • Hello Moritz

    Thank you for the inputs. 

    We could do a schematic review to understand more on this.

    If you have an email that i could use to communicate, we can exchange the information and next steps over the email.

    Alternatively, you could post the schematics on the E2E for review. 

    We can work on isolating the issues based on the review.

    Couple of questions : how does the board recover after the failure? and what cable is used between the EVM and the custom board

    Regards,

    Sreenivasa