Upon power on reset or when a downstream channel is disabled, what is the state of the SCx/SDx pins? Safe to assume high-impedance state?
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Yes, After power up (or if reset pin is toggled) then the secondary I2C lines (SDx/SCx) should be HI-Z. (Assuming the Vcc's power ramp follows the recommended specified in section 10 of the datasheet.)
Also, if Vcc is not present (GND) and secondary channels/main channel has power via pull up resistors, device should still be HI-Z.