Hi team,
On the Intel titan ridge reference design, it shows that TR have one PCIe Gen 3, one DP and one USB3.1 Gen 2 output as below shows:
if there is a docking which have two hub (one gen 1, 4 port hub/ one gen 2, 4 port hub),
How to design relative position between hub and titan ridge?
Is it possible that two hubs all connect to TR's USB3.1 gen 2 output or one of the hub have to connect to TR's PCIe output?
It would be very appreciated if you could provide an brief block diagram to demonstrate the solution.
Best regards,
Jamie Tseng