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DS90UB954-Q1: DS90UB954/953 communication fail

laisan zhang
Intellectual 315 points
Part Number: DS90UB954-Q1

Dear,

customer had tested DS90UB954/953 with EVM and all worked fine.

with the new designed PCBA of DS90UB954 and 953 EVM, the communication failed between 953 and 954. host can read 954 by i2c, the folllow picture shows the connection details:

customer used the same cabel used here to test with 954 EVM and 953 EVM, it works fine, so, the cabel shold be ok.

now need help to check the pcb layout and guide to check the problem, pcb layout as follows:

b/r

vincent

  • 0
    TI__Mastermind 30515 points

    Hello,

    pls describe your issue" failure communication" more clearly? what is detected? bit error? I2C link failure? lock issue?

    For your issue, if the link is unlocked, pls check your board 954 board design, what is the sch. and its setting? can you try to make ub953 work in internal clock mode? what is the cable type and length? PoC design and component selection?

    best regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Prodigy 55 points

    Hello,

    Now FPD-LINK has been able to communicate normally. The reason for the previous problem is that the remote DS90UB953 power-on timing is wrong. After adjustment, the camera can be successfully previewed.

    But there is a new problem, the quality of the image has problems, occasionally striped. Is there a method to evaluate the quality of FPD-LINK transmission?

  • 0 in reply to user5785175
    TI__Mastermind 30515 points

    For FPD-Link, we evaluate the transmitter, transmission channel and receiver link error, you can check the de-ser's  0x4e/0x4d, 0x55/0x56 etc. register, these are on the assigned port's bit error detection. if error is detected, pls analyze the link signal integrity, such as clock jitter, channel media's S parameter, supply noise, etc., if no error is detected, pls check the SoC why the stripe is generated. btw, you need understand the stripe's feature, it is random or periodical? this can help you isolate the root cause.

    best regards,

    Steven

  • 0 in reply to Steven(Shenzhen) Shi
    Prodigy 55 points

    Hello, I'm sorry to disturb you again.

    Would you please confirm if there is any problem with PCB design? 

    In PCB reference design, moat the GND plane under the components, What is the purpose?

  • 0 in reply to user5785175
    TI__Mastermind 30515 points

    Hello,

    generally it is suggested in our EVM refer. design to moat the GND under the FB and inductor. one purpose is to try to make the impedance as 50ohms, also for the inductor, it has magnetic noise nearby inductor, which would be coupled into the GND if it is NOT moated. So it would be better if you moat GND plane under FB/Inductor in the POC design.

    regards,

    Steven