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DP83TD510E-EVM: Cannot get link to establish with DP83822 portion of DP83TD510E-EVM

Wayne Hopkinson
Prodigy 180 points
Part Number: DP83TD510E-EVM
Other Parts Discussed in Thread: USB-2-MDIO, MSP-EXP430G2ET, MSP430F5529, DP83TD510E

So, I have two of the DP83TD510E-EVM kits and both are powered using the USB cable interface (shorted J9).  I have them connected to a couple of Raspberry Pi single board computers via a switch/hub.  I can't get these modules to establish a link with the RPi or the switch.  When I use 100BASE-T1 cards I have to force one to be MASTER and the other to be SLAVE.  Do I need to do something to the EVM modules to get them to link up like I do with the 100BASE-T1 modules operating over the same cable/switch/RPi combo?

  • 0
    TI__Expert 7040 points

    Hi Wayne,

    Please ensure that LED_0 is strapped low, J20 should be set to '0' position. This will ensure the DP83TD510 is configured in RMII Master mode, supplying the 50MHz clock to the DP83822 in RMII Slave mode. 

    The DP83822 requires the XI clock to be present at power-up or reset. So if the DP83822 is not connected to the DP83TD510 board at power-up, a reset is needed on the DP83822 after XI is present. 

    Finally, in order to establish a link between the DP83TD510 devices, an initialization script needs to be run to for our sample-able silicon available now. You can use the scripts below to establish a link through auto-negotiation or forcing the Master/Slave configuration using the USB-2-MDIO tool.

    Please note, that when using the Forced Mode scripts, extended register access should be set to "NO" in the USB-2-MDIO tool. 

    AutoNegotiation_Initialization.txt 
    begin
001f 8000 //hard reset
0608 003b //disable_0_transition
0862 39f8 //AGC Gain during Autoneg
081a 67c0 //deq offset for 1V swing
081c fb62 //deq offset for 2.4V swing
0830 05a3 //Enable energy lost fallback
0855 1b55 //MSE Threshold change
0831 0403 //energy detect threshold
0856 1800 //good1 MSE threshold change
0857 8fa0 //Enable fallback to phase 1 on watchdog trigger
0871 000c //TED input changed to slicer_in without FFE
0883 022e //Enable Rx Filter, Change PGA threshold for Short Cable detection
0402 1800 //Adjusr LD swing
0878 2248 //Change PI up/down polarity
010c 0008 //tx filter coefficient
0112 1212 //tx filter scaling factor
0809 5c80 //AGC retrain
0803 1529 //Master Ph1 Back-off
0804 1a33 //Master Ph1 Back-off
0805 1f3d //Master Ph1 Back-off
0850 045b //hybrid gain & delay
0874 6967 //kp step 0 for master
0852 7800 //FAGC init gain
0806 1e1e //Master/Slave Ph2 Back-off
0807 2525 //Master/Slave Ph2 Back-off
0808 2c2c //Master/Slave Ph2 Back-off
0850 0590 //Hybrid Gain/Delay Code
0827 4000 //Echo Fixed Delay
0849 0fe4 //Hybrid Cal enable
084b 04b5 //Echo Score Sel
001f 4000 //soft reset
end

    Force_1Vpp_Master_Init.txt 
    begin
001f 8000 //hard reset
000d 0007 
000e 0200
000d 4007
000e 0000 //disable auto-neg through extended register MMD 07
000d 0001 
000e 0834
000d 4001
000e 4000 //force master mode through extended register MMD 01
000d 0001 
000e 08f6
000d 4001
000e 0000 //force 1.0v swing through extended register MMD 01
000d 001F 
000e 0608 
000d 401F 
000e 003b //disable_0_transition
000d 001F 
000e 0862 
000d 401F 
000e 39f8 //AGC Gain during Autoneg
000d 001F 
000e 081a 
000d 401F 
000e 67c0 //deq offset for 1V swing
000d 001F 
000e 081c 
000d 401F 
000e fb62 //deq offset for 2.4V swing
000d 001F 
000e 0830 
000d 401F 
000e 05a3 //Enable energy lost fallback
000d 001F 
000e 0855 
000d 401F 
000e 1b55 //MSE Threshold change
000d 001F 
000e 0831 
000d 401F 
000e 0403 //energy detect threshold
000d 001F 
000e 0856 
000d 401F 
000e 1800 //good1 MSE threshold change
000d 001F 
000e 0857 
000d 401F 
000e 8fa0 //Enable fallback to phase 1 on watchdog trigger
000d 001F 
000e 0871 
000d 401F 
000e 000c //TED input changed to slicer_in without FFE
000d 001F 
000e 0883 
000d 401F 
000e 022e //Enable Rx Filter, Change PGA threshold for Short Cable detection
000d 001F 
000e 0402 
000d 401F 
000e 1800 //Adjusr LD swing
000d 001F 
000e 0878 
000d 401F 
000e 2248 //Change PI up/down polarity
000d 001F 
000e 010c 
000d 401F 
000e 0008 //tx filter coefficient
000d 001F 
000e 0112 
000d 401F 
000e 1212 //tx filter scaling factor
000d 001F 
000e 0809 
000d 401F 
000e 5c80 //AGC retrain
000d 001F 
000e 0803 
000d 401F 
000e 1529 //Master Ph1 Back-off
000d 001F 
000e 0804 
000d 401F 
000e 1a33 //Master Ph1 Back-off
000d 001F 
000e 0805 
000d 401F 
000e 1f3d //Master Ph1 Back-off
000d 001F 
000e 0850 
000d 401F 
000e 045b //hybrid gain & delay
000d 001F 
000e 0874 
000d 401F 
000e 6967 //kp step 0 for master
000d 001F 
000e 0852 
000d 401F 
000e 7800 //FAGC init gain
000d 001F 
000e 0806 
000d 401F 
000e 1e1e //Master/Slave Ph2 Back-off
000d 001F 
000e 0807 
000d 401F 
000e 2525 //Master/Slave Ph2 Back-off
000d 001F 
000e 0808 
000d 401F 
000e 2c2c //Master/Slave Ph2 Back-off
000d 001F 
000e 0850 
000d 401F 
000e 0590 //Hybrid Gain/Delay Code
000d 001F 
000e 0827 
000d 401F 
000e 4000 //Echo Fixed Delay
000d 001F 
000e 0849 
000d 401F 
000e 0fe4 //Hybrid Cal enable
000d 001F 
000e 084b 
000d 401F 
000e 04b5 //Echo Score Sel
000d 001F 
000e 0018 
000d 401F 
000e 0043 //Set CRS/RX_DV pin as RX_DV for RMII repeater mode
000d 001F 
000e 001f 
000d 401F 
000e 4000 //soft reset
end

    Force_1Vpp_Slave_Init.txt 
    begin
001f 8000 //hard reset
000d 0007 
000e 0200
000d 4007
000e 0000 //disable auto-neg through extended register MMD 07
000d 0001 
000e 0834
000d 4001
000e 0000 //force slave mode through extended register MMD 01
000d 0001 
000e 08f6
000d 4001
000e 0000 //force 1.0v swing through extended register MMD 01
000d 001F 
000e 0608 
000d 401F 
000e 003b //disable_0_transition
000d 001F 
000e 0862 
000d 401F 
000e 39f8 //AGC Gain during Autoneg
000d 001F 
000e 081a 
000d 401F 
000e 67c0 //deq offset for 1V swing
000d 001F 
000e 081c 
000d 401F 
000e fb62 //deq offset for 2.4V swing
000d 001F 
000e 0830 
000d 401F 
000e 05a3 //Enable energy lost fallback
000d 001F 
000e 0855 
000d 401F 
000e 1b55 //MSE Threshold change
000d 001F 
000e 0831 
000d 401F 
000e 0403 //energy detect threshold
000d 001F 
000e 0856 
000d 401F 
000e 1800 //good1 MSE threshold change
000d 001F 
000e 0857 
000d 401F 
000e 8fa0 //Enable fallback to phase 1 on watchdog trigger
000d 001F 
000e 0871 
000d 401F 
000e 000c //TED input changed to slicer_in without FFE
000d 001F 
000e 0883 
000d 401F 
000e 022e //Enable Rx Filter, Change PGA threshold for Short Cable detection
000d 001F 
000e 0402 
000d 401F 
000e 1800 //Adjusr LD swing
000d 001F 
000e 0878 
000d 401F 
000e 2248 //Change PI up/down polarity
000d 001F 
000e 010c 
000d 401F 
000e 0008 //tx filter coefficient
000d 001F 
000e 0112 
000d 401F 
000e 1212 //tx filter scaling factor
000d 001F 
000e 0809 
000d 401F 
000e 5c80 //AGC retrain
000d 001F 
000e 0803 
000d 401F 
000e 1529 //Master Ph1 Back-off
000d 001F 
000e 0804 
000d 401F 
000e 1a33 //Master Ph1 Back-off
000d 001F 
000e 0805 
000d 401F 
000e 1f3d //Master Ph1 Back-off
000d 001F 
000e 0850 
000d 401F 
000e 045b //hybrid gain & delay
000d 001F 
000e 0874 
000d 401F 
000e 6967 //kp step 0 for master
000d 001F 
000e 0852 
000d 401F 
000e 7800 //FAGC init gain
000d 001F 
000e 0806 
000d 401F 
000e 1e1e //Master/Slave Ph2 Back-off
000d 001F 
000e 0807 
000d 401F 
000e 2525 //Master/Slave Ph2 Back-off
000d 001F 
000e 0808 
000d 401F 
000e 2c2c //Master/Slave Ph2 Back-off
000d 001F 
000e 0850 
000d 401F 
000e 0590 //Hybrid Gain/Delay Code
000d 001F 
000e 0827 
000d 401F 
000e 4000 //Echo Fixed Delay
000d 001F 
000e 0849 
000d 401F 
000e 0fe4 //Hybrid Cal enable
000d 001F 
000e 084b 
000d 401F 
000e 04b5 //Echo Score Sel
000d 001F 
000e 0018 
000d 401F 
000e 0043 //Set CRS/RX_DV pin as RX_DV for RMII repeater mode
000d 001F 
000e 001f 
000d 401F 
000e 4000 //soft reset
end

    Force_2v4Vpp_Master_Init.txt 
    begin

000d 001F 
000e 001f 
000d 401f 
000e 8000 //hard reset
000d 0007 
000e 0200 
000d 4007 
000e 0000 //disable autoneg MMD 07
000d 0001 
000e 0834 
000d 4001 
000e 4000 //Force Master Mode MMD 01
000d 0001 
000e 08f6 
000d 4001 
000e 1000 //Force 2.4V swing MMD 01
000d 001F 
000e 0608 
000d 401f 
000e 003b //disable_0_transition
000d 001F 
000e 0862 
000d 401f 
000e 39f8 //AGC Gain during Autoneg
000d 001F 
000e 081a 
000d 401f 
000e 67c0 //deq offset for 1V swing
000d 001F 
000e 081c 
000d 401f 
000e fb62 //deq offset for 2.4V swing
000d 001F 
000e 0830 
000d 401f 
000e 05a3 //Enable energy lost fallback
000d 001F 
000e 0855 
000d 401f 
000e 1b55 //MSE Threshold change
000d 001F 
000e 0831 
000d 401f 
000e 0403 //energy detect threshold
000d 001F 
000e 0856 
000d 401f 
000e 1800 //good1 MSE threshold change
000d 001F 
000e 0857 
000d 401f 
000e 8fa0 //Enable fallback to phase 1 on watchdog trigger
000d 001F 
000e 0871 
000d 401f 
000e 000c //TED input changed to slicer_in without FFE
000d 001F 
000e 0883 
000d 401f 
000e 022e //Enable Rx Filter, Change PGA threshold for Short Cable detection
000d 001F 
000e 0402 
000d 401f 
000e 1800 //Adjusr LD swing
000d 001F 
000e 0878 
000d 401f 
000e 2248 //Change PI up/down polarity
000d 001F 
000e 010c 
000d 401f 
000e 0008 //tx filter coefficient
000d 001F 
000e 0112 
000d 401f 
000e 1212 //tx filter scaling factor
000d 001F 
000e 0809 
000d 401f 
000e 5c80 //AGC retrain
000d 001F 
000e 0803 
000d 401f 
000e 1529 //Master Ph1 Back-off
000d 001F 
000e 0804 
000d 401f 
000e 1a33 //Master Ph1 Back-off
000d 001F 
000e 0805 
000d 401f 
000e 1f3d //Master Ph1 Back-off
000d 001F 
000e 0850 
000d 401f 
000e 045b //hybrid gain & delay
000d 001F 
000e 0874 
000d 401f 
000e 6967 //kp step 0 for master
000d 001F 
000e 0852 
000d 401f 
000e 7800 //FAGC init gain
000d 001F 
000e 0806 
000d 401f 
000e 1e1e //Master/Slave Ph2 Back-off
000d 001F 
000e 0807 
000d 401f 
000e 2525 //Master/Slave Ph2 Back-off
000d 001F 
000e 0808 
000d 401f 
000e 2c2c //Master/Slave Ph2 Back-off
000d 001F 
000e 0850 
000d 401f 
000e 0590 //Hybrid Gain/Delay Code
000d 001F 
000e 0827 
000d 401f 
000e 4000 //Echo Fixed Delay
000d 001F 
000e 0849 
000d 401f 
000e 0fe4 //Hybrid Cal enable
000d 001F 
000e 084b 
000d 401f 
000e 04b5 //Echo Score Sel
000d 001F 
000e 001f 
000d 401f 
000e 4000 //soft reset

end

    Force_2v4Vpp_Slave_Init.txt 
    begin

000d 001f 
000e 001f 
000d 401f 
000e 0000 //hard reset
000d 0007 
000e 0200 
000d 4007 
000e 0000 //disable autoneg MMD 07
000d 0001 
000e 0834 
000d 4001 
000e 0000 //Force Slave Mode MMD 01
000d 0001 
000e 08f6 
000d 4001 
000e 1000 //Force 2.4V swing MMD 01
000d 001f 
000e 0608 
000d 401f 
000e 003b //disable_0_transition
000d 001f 
000e 0862 
000d 401f 
000e 39f8 //AGC Gain during Autoneg
000d 001f 
000e 081a 
000d 401f 
000e 67c0 //deq offset for 1V swing
000d 001f 
000e 081c 
000d 401f 
000e fb62 //deq offset for 2.4V swing
000d 001f 
000e 0830 
000d 401f 
000e 05a3 //Enable energy lost fallback
000d 001f 
000e 0855 
000d 401f 
000e 1b55 //MSE Threshold change
000d 001f 
000e 0831 
000d 401f 
000e 0403 //energy detect threshold
000d 001f 
000e 0856 
000d 401f 
000e 1800 //good1 MSE threshold change
000d 001f 
000e 0857 
000d 401f 
000e 8fa0 //Enable fallback to phase 1 on watchdog trigger
000d 001f 
000e 0871 
000d 401f 
000e 000c //TED input changed to slicer_in without FFE
000d 001f 
000e 0883 
000d 401f 
000e 022e //Enable Rx Filter, Change PGA threshold for Short Cable detection
000d 001f 
000e 0402 
000d 401f 
000e 1800 //Adjusr LD swing
000d 001f 
000e 0878 
000d 401f 
000e 2248 //Change PI up/down polarity
000d 001f 
000e 010c 
000d 401f 
000e 0008 //tx filter coefficient
000d 001f 
000e 0112 
000d 401f 
000e 1212 //tx filter scaling factor
000d 001f 
000e 0809 
000d 401f 
000e 5c80 //AGC retrain
000d 001f 
000e 0803 
000d 401f 
000e 1529 //Master Ph1 Back-off
000d 001f 
000e 0804 
000d 401f 
000e 1a33 //Master Ph1 Back-off
000d 001f 
000e 0805 
000d 401f 
000e 1f3d //Master Ph1 Back-off
000d 001f 
000e 0850 
000d 401f 
000e 045b //hybrid gain & delay
000d 001f 
000e 0874 
000d 401f 
000e 6967 //kp step 0 for master
000d 001f 
000e 0852 
000d 401f 
000e 7800 //FAGC init gain
000d 001f 
000e 0806 
000d 401f 
000e 1e1e //Master/Slave Ph2 Back-off
000d 001f 
000e 0807 
000d 401f 
000e 2525 //Master/Slave Ph2 Back-off
000d 001f 
000e 0808 
000d 401f 
000e 2c2c //Master/Slave Ph2 Back-off
000d 001f 
000e 0850 
000d 401f 
000e 0590 //Hybrid Gain/Delay Code
000d 001f 
000e 0827 
000d 401f 
000e 4000 //Echo Fixed Delay
000d 001f 
000e 0849 
000d 401f 
000e 0fe4 //Hybrid Cal enable
000d 001f 
000e 084b 
000d 401f 
000e 04b5 //Echo Score Sel
000d 001f 
000e 001f 
000d 401f 
000e 4000 //soft reset

end

    .

    Regards,

    Justin 

  • 0 in reply to Justin Lazaruk
    Prodigy 180 points

    Thanks Justin,

    The setting for J20 helped to light up the link light between the computer and the RJ45 but the two DP83TD510E-EVM kits won't establish or promote a link that I can drive traffic through.  I haven't implemented your scripts because I'm still having trouble connecting to the boards using the USB-2-MDIO tool.  The DP83TD510E-EVM board combination is the only thing connected to my PC via a USB cable. 

    Looking at the guide for the USB-2-MDIO it says that I need the MSP430F5529 USB LaunchPad Evaluation Kit.  So if that's true, I have two on order for Monday arrival as well as two of the MSP-EXP430G2ET.  If the LaunchPad Evaluation Kit is not needed, are there any tips for connecting the PC and USB-2-MDIO program to the board?  I am powering the board with the same USB cable I'm trying to connect with.  The USB power jumper (J9) is shorted.  The other 10 jumpers are in the state they arrived in which means nothing is connected to any of the four posts making up J3 and J20 was changed per your suggestion (photo passed in below).

    Sincerely,

    Wayne

  • 0 in reply to Wayne Hopkinson
    TI__Expert 7040 points

    Hi Wayne,

    Can you confirm that you see the same results if you power the DP83TD510 EVM through the 5V supply on J12?

    Regards,
    Justin 

  • 0 in reply to Justin Lazaruk
    Prodigy 180 points

    Hi Justin,

    The powering of the device with a proper power supply changed things.  It responds to the USB-2-MDIO now.  I removed the USB power jumper.

    So in this mode I'll run the AutoNegotiation_Initialization.txt and Force_1Vpp_Master_Init on one of the board combos and the AutoNeg and Slave script on the other board combo (in that order)?

    Making progress!  This is good news!

    -Wayne

  • 0 in reply to Wayne Hopkinson
    TI__Expert 7040 points

    Hi Wayne,

    There are three possible configurations to run to establish a link between the DP83TD510E boards:

    1. AutoNegotiation_Initialization.txt on both Board A and Board B. (Extended registers menu should be set to "YES")

    2. Force_1Vpp_Master_Init.txt on Board A and Force_1Vpp_Slave_Init.txt on Board B. (Extended registers menu should be set to "NO")

    3. Force_2p4Vpp_Master_Init.txt on Board A and Force_2p4Vpp_Slave_Init.txt on Board B. (Extended registers menu should be set to "NO")

    Please do not run both Auto-Negotiation and Forced mode script on the same board. 

    Regards,
    Justin