• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 33 subscribers
  • Views 661 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCAN4551-Q1: SPI communication not working

John Chew
Prodigy 20 points
Part Number: TCAN4551-Q1

Hi,

I'm currently writing a SPI driver to communicate with TCAN 4551-Q1.

The SPI rate is 10Mhz

Approach 1:

I tried to send 0x41000001 follow by 0x00000000 in order to read TCAN.

However there is no response from TCAN.

Approach 2:

I tried to set TCAN to sleep in check if the SPI is working correctly by sending 0x61080001 follow by 0xC8000420.

But I checked on the Vccfltr pin, it is still around 5v and drop to 0v after few minutes.

Questions:

1. I know the maximum rate for SPI is up to 18Mhz. What about the minimum rate?

2. Is there any method that I can check if the SPI is function correctly in TCAN?

  • +1
    TI__Guru 53575 points

    Hi John,

    And welcome to E2E! Thanks for your detained description and scope shots. 

    Are these waveforms labeled correctly? It appears that the TCAN4551 input SDI is not being driven whereas the output on SDO reflects the data you are driving. Are these labeled wrong or is there perhaps a connection issue? Apart from this, the edges and timing of the waveforms look good.

    Regarding the message format: every transaction will require a proper header before data is transferred. When reading from the device, the state of the SDI input is disregarded after the length delimiter. The clock input is used to shift the read bits out on the SDO output. The whole read transaction must occur during the same assertion on nCS. Once nCS is deasserted (goes high), a new header will need to be sent to address the correct memory location. 
    For example, to read the device ID, one would send the following bit sequence:

    0x4100000200000000      // whole sequence sent during same nCS assertion

    0x41:       read optcode
    0x0000:     address for device ID
    0x02:       length of read (bytes)
    0x00000000: dummy data to extend transaction for TCAN4551 to respond

    John Chew said:
    1. I know the maximum rate for SPI is up to 18Mhz. What about the minimum rate?

    This interface is state based on the clock so there's theoretically no minimum rate. Based on other timers and timeouts, I would say that an effective minimum would be a few kbps. 10MHz will not be an issue. 

    John Chew said:
    2. Is there any method that I can check if the SPI is function correctly in TCAN?

    The Interrupt and Diagnostic registers ('h000 to 'h000C) are good to read initially to ensure that the SPI interface is working properly. There is also a scratchpad register ('h0808) that can be used to test read/write functionality. If the diagnostic registers are the only accessible addresses, please ensure that the clock signal for TCAN4551 is active and valid. All registers above 'h000C depend on this clock input to be accessed. 

    Let me know if you have any more questions.

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Prodigy 20 points

    Hi Eric,

    I tried to read and write the scratchpad register is works!

    However, I'm still unable to read from address 'h0000 - h'0008 (I spend most of the time debugging this).

    This is not an issue in the time being since I'm able to config and read other address now.

    Note: This issue is also solved after configuring the "clk" pin to low during inactive period. 

    Regards,

    John