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SN6507: Unexpected frequency shift on SN6507 with external resistor and TVS on CLK pin

Part Number: SN6507

Tool/software:

Hello,

I am using the SN6507 in an isolated DC-DC application and encountered unexpected behavior related to the CLK pin configuration.

Observed behavior:

  1. When I connect a 60 kΩ resistor from the CLK pin to GND, the SN6507 operates at ~200 kHz.

  2. When I add a 1.2 V TVS diode (200 pF typical capacitance) between CLK and GND (in parallel with the resistor), the switching frequency increases to ~391 kHz.


My questions:

  • Does SN6507 monitor the CLK pin voltage or impedance at startup to decide how the internal oscillator should behave?

  • Is there any threshold voltage, pull current, or timing mechanism used internally that may be influenced by external RC components?

  • Why does adding a TVS increase the switching frequency significantly?

  • What’s the recommended way to configure the CLK pin if I want to rely on the internal oscillator but still provide some protection?

This behavior is reproducible and consistent across samples.

Thank you for your insights!

Best regards,

  • Hello Yuchun,

    At power up the part checks the state of the CLK pin for 100us. If resistor with less than 500uA is found within 100us at power up on the CLK pin then the resistor controlled variable oscillator works (Programable switching frequency mode). The impedance of TVS diode is getting added to the CLK pin and can change the frequency.

    Thanks. 

  • Follow-up Question – SN6507 CLK pin behavior under EFT disturbance

    Hi, thanks for the clarification regarding the CLK pin detection at startup.

    I now face a related issue during EFT testing:
    • The CLK pin is connected to GND via a 60 kΩ resistor, with a TVS diode in parallel.
    • During EFT bursts, the CLK pin picks up transient voltage spikes, which seem to trigger a mode switch from internal to external clock, even though no valid clock is present.
    • After the EFT event ends, the SN6507 sometimes stops switching entirely, likely because it is stuck waiting for a non-existent external clock.

    I originally used a 3.3 V TVS, and the device worked fine. However, after checking the datasheet stating the external clock detection threshold is 1.5 V, I switched to a 1.2 V TVS, which caused frequency shifts and unstable operation.

    My follow-up questions are:
    1. Is there a recommended way to prevent the device from switching into external clock mode during EFT events, especially when using the internal oscillator?
    2. Would TI recommend sticking with a 3.3 V TVS for EFT robustness, even though the threshold is listed as 1.5 V?
    3. Is there any internal debouncing or filter on the CLK pin to avoid false mode switching from transient noise?

    I appreciate any design recommendations or reference circuits that can improve noise immunity on the CLK pin during EFT testing.

    Thanks again!

    Best regards,

  • Hi Yuchun,

    A glitch filter may help to filter out any noise coupling through EFT. Adding a cap (200pF to 1nF) can help, depending on over all system layout. 

    The absolute max voltage rating for clock pin is 6V. If the transient voltage spikes are continuously going high during EFT, adding a TVS will help.

    In your use case 3.3V TVS (220pf capacitance) can work effectively.

    Thanks.