SN74HCS00: 74HCS gates' Cpd

Hello, and welcome to the forums!

I think you bring up some interesting information here, and you're highlighting a specification that generally doesn't get much attention.

RickTH said:

noticed all 74HCS gates and some other functions all have a Cpd of 10pF in your datasheets.

Now in other families like 74HC or 74LVC , their Cpd's vary a lot depending on which gate.

How come for HCS this is a "clean" 10 pF (for all) ? Preliminary numbers ?? Really ? A year after their introduction?

For the HCS family, it's actually not strange for all of the gates to be10 pF because of how we define the spec and how this family of devices work. 

Technically the Cpd varies from about 4.5pF at 2V to 9.5pF at 6V, however we only put one value in the datasheet, and it's only a typical value.

Our systems engineer chose to go with 10pF because Cpd is traditionally specified at the maximum supply voltage.

RickTH said:

How do you calculate these Cpd numbers because they are wrong .

Cpd is measured as explained in this application report: "CMOS Power Consumption and CPD Calculation"

RickTH said:

Errors on the datasheets ? No one notices

after decades since they have been available?

Yes - there are errors in decades-old datasheets, I can attest to that on a daily basis. We support thousands of devices, and many of those were developed a long time ago.  Some include errors, typically minor in nature. Those minor errors often don't warrant a complete reworking of the datasheet, which takes a great deal of time and effort from a team of people.

When we find a larger errors (for example, VOH should be "4.6" but it reads ".6" instead), then a datasheet revision happens, regardless of the effort, because having accurate specs _is_ important to us.

As for no-one noticing -- Cpd is kind of unique in that I don't think I've ever been asked to verify it, with the exception of this post, in 6+ years as an applications engineer working specifically with logic. It's tested at the initial development of a device, and then left alone as a typical value in the datasheet.

Typical values don't provide any guarantee - they are just there for your information - so it's likely that someone may have noticed in the past, but then they weighed the cost of updating the datasheet against slightly changing a typical value and decided to leave it as-is.

RickTH said:

If a gate has 2 inputs , are the Cpd values when using the 2 inputs together or just on 1 with the other not blocking 

the gate , like on the Vcc for a NAND gate ?

Part of the calculation for Cpd is accounting for multiple inputs / outputs switching. The important thing is to get an output switching since usually the power consumption at the output dominates the power consumption of the device (not as much for older devices).

Conversely, when calculating power consumption with Cpd, the number of switching input/outputs must be included in the equations to get the final answer.

RickTH said:

74LVC74 has Cpd 26pF  but its little logic brother 74LVC1G74 has Cpd of 37 (both at 3,3V) !

How is this possible? Many more inconsistencies in Cpd throughout your datasheets of Cmos logic.

The first release of the SN74LVC74A datasheet was in 1993, while the SN74LVC1G74 came out in October 2009. Technology changes rapidly -- even though these two are specified for similar supply voltages, they are not built on the same process node.

(Edit: Corrected 10V max to 6V max)