We have an FPGA driving the hex buffer - 74HCT367. Because of the high rise times(400ps), there are big overshoots and undershoots at the input of the buffer.
How much of undershoot can the buffer tolerate? We are seeing upto -2v of undershoot at the buffer input.
The undershoot is for less than 5nsecs.
The device is supposed to have clamping diodes. I don't see the clamping happening. Is it because the edge rates are too fast for the diode.