Other Parts Discussed in Thread: SN74HCS164
Do we have CD74AC164 schematic and layout example can provide to customer for reference?
These packages do have 14 pins. The pin count below the image is an octal number wrong.
The RC circuit must be slow enough so that the /CLR input is still low when VCC has reached the minimum supply voltage. So this depends on how fast VCC powers up.
Thanks for pointing out the error in the datasheet that the pin counts are wrong. You are correct that those should say "14-Pin" on both packages. I will put this in our errata list to fix in the next datasheet update.
The values of R1 and C1 will depend on the customer's system requirements. What is their voltage supply ramp rate? Do they have a limitation on the startup time allowable for the shift register?
To give you a reasonable estimate of the values required, I hope this inequality helps:
dVcc/dt := power up ramp rate, in volts per second
t_startup := maximum startup time allowable, in seconds
This isn't precise, but it should give a reasonable estimate of the values required.
For example, if the power up ramp rate is 1us/V and the maximum startup time were 100us, then the range of values for tau would be:
500ns < tau < 100us
In this case, a 10k resistor and 1nF capacitor would work. Once a prototype system is built, these values could be adjusted to optimize operation.