TXS0102: Multiple TXS0102s

Seung-Gon Hong

Part Number: TXS0102

Hi,

As shown in the block diagram below, four TXS0102s are used in one I2C line in the designed board. But there was an issue with the processor not reading the data properly.

So, when I checked the I2C line with the scope, I found that 0.5V is floating at the ground when the I2C SDA and SCL are low as shown below.

TXS0102 has internal pull-up 10Kohm at A and B ports, respectively, as shown below.

I have two questions here.
1. I wonder if there is any problem if I connect four TXS0102s to the same I2C lines as in our application.
2. If Master or Slave signal is made Low on i2c (SDA or SCL) line, all N2 channels inside TXS0102 (refer to the 3rd picture) will be closed, and the internal resistance of TXS0102 is all Parallel (10Kohm x 8) It seems to be connected to 1.25Kohm. The sink current will be 2.6mA. Can high sink current cause issue like this?

over 3 years ago

+1 Dylan Hubbard over 3 years ago

TI__Mastermind 45725 points

Hi Sueng-Gon,

If your controller device isn't able to sink the current from all of the pull-ups effectively, then you will have DC offset issues such as this. The I2C switch can also make this worse since there will be a voltage drop across the channel FET. TXS is recommended more for point to point connections. It also doesn't seem like its being used for translation, what's the purpose of the translator?

0 Seung-Gon Hong over 3 years ago in reply to Dylan Hubbard

Prodigy 160 points

Hi Dylan,

Thank you for your quick reply.

The reason for using translator is that the power domain is different, so it was used for isolation purposes.

Could you please explain in detail the DC offset and voltage drop you mentioned?

Thanks,

0 Dylan Hubbard over 3 years ago in reply to Seung-Gon Hong

TI__Mastermind 45725 points

Hey Seung-Gon,

You can refer to the app notes below as they will provide more details.

https://www.ti.com/lit/an/scea044/scea044.pdf

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TXS0102: Multiple TXS0102s