• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 22 subscribers
  • Views 449 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TXS0104E: Issue with IBIS model in simulating SDA net of PMBUS interface

Himaja Manam
Prodigy 10 points
Part Number: TXS0104E

Hi,

I'm trying to simulate the PMBUS SDA net in Hyperlynx tool between

  1. Two voltage translators
  2. When slave - translator is driver & Master - FPGA is receiver

In both the cases, the output is going high to 3.3V but no activity on the bus.

Note: There is an external 10K pull-up resistor on the line, pulled to 3.3V.

Kindly support on this issue.

Thanks

  • 0
    TI__Genius 16735 points

    Hi Himaja,

    The IBIS models are not designed to simulate logic functionality between parts. The IBIS model is used to look at the output waveform based on what is present on its output. Basically IBIS is for signal integrity and so you will not get it to communicate with the other chips.

    Regards,

    Karan

  • 0 in reply to Karan Kotadia
    Prodigy 10 points

    Hi Karan,

    I'm trying to get the timing delays because of pin capacitance and I'm basically connecting the output to the input of the same chip, one acting as a driver and other acting as a receiver. I'm not trying to ascertain the logic functionality.

    Regards,

    Himaja

  • 0 in reply to Himaja Manam
    TI__Genius 16735 points

    Hi Himaja,

    Okay, can you share your hyperlynx project file?

    I am not following on what the issue is. What do you mean by there is no activity on the bus?

    Regards,

    Karan

  • 0 in reply to Karan Kotadia
    Prodigy 10 points

    Hi Karan,

    I'm not able to share the project file as it is not getting uploaded here. Hence attaching snips for reference.

    U02XLTR0.3 pin A2 being the driver and U01XLTR0.12 pin B2 receiver. The output waveform from Interactive simulation in hyperlynx is as below.

    Hope you will get some understanding on the issue.

    Regards,

    Himaja

  • 0 in reply to Himaja Manam
    TI__Guru* 97046 points

    Hello Himaja,

    Can you test the device by itself, just with a resistive or capacitive load connected to ground and verify that the model is loaded correctly?

    I'm afraid I don't have a license for hyperlynx, so I can't test it myself -- but also I can't read the schematic provided (it's too blurry).