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TXB0106: Possible Contention Issues

Alan McGee
Prodigy 10 points
Part Number: TXB0106

Hello TI,

I have been debugging a problem at work that uses an FTDI chip connected to the TXB0106 bi-directional level shifter. On the other side of the level shifter, is a chip that I want to communicate with. The level shifter is being used in my scenario to convert 3.3V to 1.8V and connected in between the target and host. For my level shifter, my Vccb is 3.3V and my Vcca is 1.8V. I have the Output Enable pin pulled up. I am communicating using SWD protocol so I am using one channel on the level shifter for input and output (SWDIO). However, I seem to be noticing contention issues on the channel that is being used bi-directionally. I think my problem may be a timing issue where the host sends data through the level shifter and the target chip is trying to send an acknowledgement back, but I have a suspicion that both sides of level shifter are thinking they are input or output and causing contention problems through this particular channel of the level shifter. 

I tried another experiment involving a J-Link microcontroller (instead of FTDI) connected to the level shifter and found that it connects with my chip successfully. However, when I significantly extended the length of my wire (SWDIO pin - going from J-Link device to level shifter), the contention occurs again. I was hoping TI customer service could possibly shed some light on why this may be happening or if I may be missing a setup-condition? The capacitance of my traces were <70pF which met the spec listed on the data sheet. I was also curious about the 'one-shots' listed on the data sheet and how the chip turns these on (PMOS/NMOS) based on rising edges/falling edges. I'm wondering if my contention problem is related to this mechanism? I have attached a block diagram of my test setup and two oscilloscope screenshots of a 'good connection' (no contention problems) and 'bad connection' (possible contention problems). I appreciate any knowledge that you can provide.

  • 0
    Prodigy 10 points

    I'm sorry, I forgot to mention on my attached oscilloscope graphs....Yellow = SWDIO (input/output Data) and Purple = SWCLK (clock) 

  • 0
    TI__Guru* 97046 points

    Hey Alan,

    I'd like to get a closer look at this section of your scope shot:

    There are usually two things that cause issues for TXB translators -- heavy capacitive loads, and relatively long transmission lines (12+ inches).  It sounds like your issue may be the latter.

    It looks like the loading changes in this timeframe, possibly due to this 470 ohm:

    I'm not very familiar with this protocol -- is TDI an output or an input?  I would guess output since having 470 ohm in series with an input wouldn't really do anything.  That's most likely the source of half of the issues -- TXB devices already has a series resistor on each channel, so there's a bit of a voltage divider if there's also a 470 ohm resistor in series with that.

    Alan McGee said:
    I have a suspicion that both sides of level shifter are thinking they are input or output and causing contention problems

    The translator has no intelligence to it - both sides are always inputs and outputs -- the only exception is when there's a rising or falling edge, which causes the one-shot to fire for a short time to help speed up output transition times.

    With heavy loads -- especially distributed loads (transmission lines) -- this can result in oscillations, since one side triggers, then a reflection causes the other side to trigger, and thus the two can oscillate.

  • 0 in reply to Emrys Maier
    Prodigy 10 points

    Hello Emrys,

    Thanks for your reply. I will send you a close-up scope shot soon, our office has been closed with the recent holiday covid spike. I was under the impression that TDI is an input due to its name: Test Data Input so perhaps you are right in that the resistor is not doing anything. My ground looks fine and the length of my traces are < 12". In your opinion, do you feel that the resistor between TDI and TDO pins could impact the contention problem over the SWDIO channel? 

    Thanks,

    Alan

  • 0 in reply to Alan McGee
    TI__Guru* 97046 points

    Hey Alan,

    My assumption here is that the resistor was placed to prevent bus contention, but the connection as drawn is incorrect (ie the connection should go to TDI instead of TDO directly). If this is the case, then the resistor could cause issues -- assuming TDO is outputting all the time and the TXB must overdrive that pin. It doesn't have the drive strength to do that (output strength is 4kohm).