This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CD4504B: Asking for the CD4504BPWR design suggestion

Part Number: CD4504B

Hi Sir,

 

My customer would like design CD4504BPWR.

Would you please review parameters and provide your comment?

 Conditions:

Vcc=3.3V

Vdd=7.125V

SELECT=Low (CMOS-CMOS)

 

 

  1. What is Vcc spec in datasheet? Only Vdd is available in datasheet.

          

        2. What is the Vih and Voh under below conditions?

         Vcc=3.3V

          Vdd=7.125V

        SELECT=Low (CMOS-CMOS)

 

 

BR,

SHH

  • The supply voltage is VCC. The VDD column is a test condition (that is not relevant for VCC).

    The high-level voltage of TTL signals is about 3.3 V. You should use a 5 V supply and TTL mode.

  • Hi Clemens,

    thanks for feedback.

    Would you please help for custoemer's questions? looking forward to see your feedback.

    1. Would you please let me know what the voltage range is? do you mean Vcc range is within 5V~18V?

    from below table, Vcc seems only 3V? (COMS mode)

    2. Would you please review scheamtic and provide comment? Vcc=3.3V, Vdd=7.125V, SELECT=low(CMOS mode)

    3. In CMOS mode, what is Vih and Voh values under below conditions?

    Vcc=3.3V,

    Vdd=7.125V

    BR,

    SHH

  • 1. The Recommended Operating Conditions table on p. 3 specifies a voltage range from 5 V to 18 V for all temperatures. Figure 11 specifies a voltage range from 3 V to 20 V for 25 °C.

    2. I see no obvious problems in this schematic.

    3. There are no guaranteed electrical characteristics for supply voltages below 5 V. But input voltages near the supply rails will work in any case, and with high-impedance CMOS inputs, the device driving the AFE_Bx signals will have no problems reaching these voltages.