SN74AUP1G17: Dynamic power

Hello Oba-san,

All of the above devices include a Cpd specification that can be used to calculate the dynamic power consumption.

For an example, I grabbed this from the SN74AUP1G17:

At 3V with a 2 kHz signal, assuming a typical load of 30pF, the dynamic power consumption is calculated as described in this FAQ: [FAQ] How do I Calculate Power Consumption or Current Consumption for my CMOS Logic Device? 

P_T = Cpd * Vcc^2 * f_i * N_sw = 4pF * (2V)^2 * 2kHz * 1 = 32 nW

P_CL = C_L * f_o * Vcc^2 = 30pF * 2kHz * (2V)^2 = 120nW

Total transient power is 152 nW.

Hi Oba-san,

For the P_T equation, N_sw is the number of inputs switching at the described frequency.

For the P_CL equation, each output should have the frequency and loading multiplied, then those values are summed and multiplied by the VCC^2 term.

The above information is shown in the FAQ I previously linked.