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TXB0104-Q1: Question about TXB0104QRGYRQ1

Part Number: TXB0104-Q1
Other Parts Discussed in Thread: TXS0206, TXS0108E-Q1, TXS0108E

Hello:

We now use TI chip txb0104qrgyrq1 as the level conversion chip. The schematic diagram is as follows. There are several points in the schematic diagram that are inconsistent with those recommended in the specification. Please help to verify whether there are risks:

1. What is required in the unused pin specification is that B3, B4, A3 and A4 all need to be connected with pull-down / pull-up resistance. In actual use, A3 and A4 are not connected with pull-down. Will this affect the normal use of other pins, such as A1 and A2?

2. The pull-up resistance value is required to be greater than 50K in the specification. We just set 50K. Is there a risk? If there are risks, what are the general consequences

3. Is there any risk when OE pin is directly added to 1.8V power supply without pull-down resistance?

  • 1. See [FAQ] What should be done with unused I/O pins of the level translator devices?

    2. The TXB output drivers are very weak; they have an impedance of about 4 kΩ. Pull-up resistors stronger than 50 kΩ would prevent the outputs from generating a valid logic level voltage. (All this implies that the pull-up resistors will not have any effect while OE is high.)

    3. The datasheet says that "to ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor". If you do not care about the state of the I/Os during power up or power down, you can connect OE directly to VCCA.

    For SDIO, you should use the TXS0108E-Q1, or a specialized translator like the TXS0206.

  • Hello Clemens:

    Since board has been mass-produced, My client doesn't want to make design changes, so will there be risks in the working process for the pins that have not been pulled down? Will it affect other pins?

    Do you have any relevant assessments, Thanks!!!

  • Hey Jimmy,

    The unconnected pins will be fine the way they are and won't affect the other data channels. I'm a little unsure if the TXB family will work for SDIO which is why Clemens suggested the TXS family. Was this configuration tested to verify that it properly works? What's the purpose for all of the pull-ups connected to the I/O?

  • Hello Clemens & Dylan:

    Regarding txs0108e, we have another question to confirm with you. According to the specification of the chip, the internal pull-up resistance of the chip is about 4K Ω when the level is high and about 40K Ω when the level is low, which conflicts with the specification requirements of w263-01a:

    WiFi chip requirements

    Would you please help confirm whether the internal pull-up resistor of txs0108e will affect the normal use of WiFi chip? If yes, how to adjust the peripheral circuit without replacing the chip? thank you very much!

  • Those requirements are for passive pull-up circuits. The TXS uses edge accelerators, so its behaviour is different.

    No level shifter is impedance controlled. You have to test if it works.

  • Hello Clemens & Dylan:

    The attachment is the WiFi schematic page using TXS0108E. Please help to evaluate it. Thank you!

    WIFI page.pdf

  • Unused TXS I/Os should be left open. Otherwise, looks OK.