Other Parts Discussed in Thread: TXS0206, TXS0108E-Q1, TXS0108E
Hello:
We now use TI chip txb0104qrgyrq1 as the level conversion chip. The schematic diagram is as follows. There are several points in the schematic diagram that are inconsistent with those recommended in the specification. Please help to verify whether there are risks:
1. What is required in the unused pin specification is that B3, B4, A3 and A4 all need to be connected with pull-down / pull-up resistance. In actual use, A3 and A4 are not connected with pull-down. Will this affect the normal use of other pins, such as A1 and A2?
2. The pull-up resistance value is required to be greater than 50K in the specification. We just set 50K. Is there a risk? If there are risks, what are the general consequences
3. Is there any risk when OE pin is directly added to 1.8V power supply without pull-down resistance?





