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SN74AXCH8T245: 1.8V To 3.3V translation for RGMII

George Huang
Prodigy 250 points
Part Number: SN74AXCH8T245
Other Parts Discussed in Thread: SN74AXC8T245, SN74AVC8T245

Hello,

 

Our customer is experiencing the RGMII issue when using SN74AXCH8T245 as level shifter from 1,8V FPGA to 3.3V PHY (for both TX_CLK and all TX_DATA). Specifically, on TX side, the 125MHZ TX_CLK got distortion for its duty cycle (from input around 51-49 to output around 57-43 )and increased falling time. The data falling edge also has longer falling time compared to its rising time (see attached waveforms). This makes rising edge aligned well but falling edge with extra offset.

 

My questions are:

1) How good the SN74AXCH8T245 can support RGMII, for 1.8V to 3.3V?

2) Cannot find the output skew spec in the datasheet. Does TI have any measurements/test results on the output skew among all bits? What is the range of this skew could be in terms for different parts, different temperatures?

3) Do you have any suggestion about the described duty cycle distortion and increased falling time?

4) Not in stock, is that possible to get couple of piece samples of SN74AXC8T245?

 

Thanks

  • 0
    TI__Guru* 97046 points

    Today is a US holiday -- we will get back to you tomorrow.

  • 0
    TI__Guru* 97046 points

    Hi George,

    Our expert on translators is out of office today -- I can try to comment on some of this, but he may have additional insight to provide when he is back.

    George Huang said:
    1) How good the SN74AXCH8T245 can support RGMII, for 1.8V to 3.3V?

    From what I know of the RGMII specification, it is extremely strict on timing. I believe the ability for the AXC translator to work in your application will depend heavily on the system design and which devices are communicating on either end -- I don't think there's any way we can guarantee that it will work in all cases.

    The best solution is to design your RGMII bus to not require voltage translation.

    George Huang said:
    2) Cannot find the output skew spec in the datasheet. Does TI have any measurements/test results on the output skew among all bits? What is the range of this skew could be in terms for different parts, different temperatures?

    Typically output skew for logic devices can be up to 2ns at low supply voltages, and up to 1ns at 'nominal' (higher) supply voltages. Typically if there is no specification in the datasheet, then data was not taken -- ie if data was taken, it would have been taken to put in the datasheet.

    George Huang said:
    3) Do you have any suggestion about the described duty cycle distortion and increased falling time?

    The AXC translator doesn't have a specification for duty cycle distortion, output transition times, or independent t_PLH and t_PHL delays -- so we can't guarantee the same rise/fall times or duty cycle distortion.

    George Huang said:
    4) Not in stock, is that possible to get couple of piece samples of SN74AXC8T245?

    Please contact the appropriate marketing team with a ZS request.

    If you are requesting this device in hopes that it will have a different performance than the SN74AXCH8T245 -- it is very unlikely that they will see any difference in operation. These devices are using the same design and will likely have the same characteristics.

    Another option would be to try the SN74AVC8T245 -- I would recommend to also request some samples of this device for the customer to try out.