Other Parts Discussed in Thread: SN74ALVCH373, SN74HCS72
Hello,
I have three queries:
1. I would like to know what would be the output state (shorted to VCC or GND or Hi-Z) of the AND gate SN74AHC1G08 when the IC get damaged/failed due to any reason (e.g. due to over voltage, ageing, temperature etc.).
2. In the SN74ALVCH373 D latch truth table, with OE = High, the Q becomes High Z. What happen if the Q is pulled to High with 3.3V using pull up resistor. does it stay High?
3. Please confirm my understanding for D latch as per truth table in page 2 of datasheet (SN74ALVCH373).
a. when D = LOW and LE transition from High to Low, then Q stays at LOW irrespective of change in the state of D input
b. When LE = HIGH, the input at D flows to Q
let me know if any clarifications required. Thanks for the support in advance.
Regards,
Anand M