SN74F112: Input Capacitance for Clock Inputs

Hi Clemens,

I was looking at alternatives to promote, but we need to support 5V which rules out LVC.
Also, it would need to be P2P with the SO-16 (NS) packages.

This basically rules out all devices that have the lowest propagation delays (can support >100MHz inputs)

But let's say I could convince my customer to consider SOIC (just barely P2P...), what would be a good recommendation?

I'm just seeing the CD74xxACxx options?

Regards,

Darren

Hi Clemens, 

The application here needs the SO package.
The input capacitance helps in calculating the distortion to the rising/falling edge timings of the input signal.

If we don't characterize bipolar inputs for input capacitance, how would you go about calculating how the input parasitics affect the incoming signal?

Edit #1:
This posting states that even bipolar transistors have parasitic capacitances surrounding their terminals, as a natural result of their junctions.
https://electronics.stackexchange.com/questions/151982/how-are-cobo-and-cibo-defined#:~:text=A%20BJT%20has%20several%20parasitic%20capacitances%20between%20all%20three%20of%20its%20terminals.&text=As%20for%20the%20terminology%2C%20base,output%20is%20at%20the%20collector. 

Is there no way to get a typical input capacitance from design?
In bipolar transistor datasheets, this is sometimes specc'd as "Cibo"

Edit #2:
I just found this TI app note "Designing with Logic".

p18) All digital devices capacitively load the outputs of the circuits driving them.

Table 3 lists "typical" input capacitances for Bipolar devices.
"SN74F" logic devices are listed as having 5pF typical input capacitances. Is this number accurate?
Do we have a ballpark estimate of the MAX input capacitance? Perhaps <15pF?

Regards,
Darren

Which device are you trying to replace?

I am not a TI employee and do not have access to any more information than you.

Other F devices like the SN74F00 have IBIS and SPICE models. (I suspect that the input current has a larger effect on the input signal than the capacity.)

Hi Darren,

If you would like to discuss proprietary details of our devices, I would recommend you use the internal forums rather than the public ones.

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Clemens is very helpful, but as he said, he does not have access to internal information from TI -- and I cannot post anything regarding that information to a public forum.

Hi Clemens, Emrys,

I appreciate the feedback.

My original question was simply:

"What is the input capacitance (Ci) for the SN74F112 CLK inputs?"

I understand from Clemens' (non-TI) comment that bipolar input devices and CMOS input devices have a different structure and thus may or may not characterize the input capacitance the same way, if at all.

Still, this document from TI published online: "Designing with Logic" mentions "SN74F" logic devices have 5pF typical input capacitance.
This is accurate?

I understand we cannot share proprietary information on the public forum, so once I confirm if the above information is accurate, I might reach out offline regarding the max values.

Regards,
Darren