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SN74LVCC4245A: Switching DIR with glitch

Part Number: SN74LVCC4245A
Other Parts Discussed in Thread: SN74LXC8T245

Hello,

I would like to know about glitch caused by switching Direction.

I measured waveform at B8 pin the figure below, I have noticed glitches occuring.

OE:always "ENABLE", A8="H", B8="H"(Tristate with pullup)

The waveforms are shown below.

The glitch level exceeds the absolute maximum rating(VCCB 3.3+0.5 = 3.8V < 3.87V), I guess some action is needed.

I think the glitches caused by swtching DIR("L" to "H", DIR3 measured SN74LVCC4245 DIR pin).

I have 3 questions about it.

Q1. Is this behavior  within T.I's expectations?

Q2. Could you tell me what I can do to  prevent this glitch?

Q3. If there are any exceptions to the maximum ratings, please let us know what they are.

Best Regards,

Matsushita

  • This is typically caused by insufficient decoupling. (The schematic does not show any decoupling capacitors.)

  • Thank you for reply.

    Although not shown in the schematic, 0.1uF MLCC is mounted near each VCC(Pin#1,24, within approx. 2 mm).

    We also suspected about decoupling, so we tried change MLCC up to 1uF, the waveform was not affected.

    Could you tell me how much decouling would be sufficient?

  • In general, 0.1 µF per supply pin is sufficient. (And a low-inductance connection to the chip is more important than the actual capacitance value, so a smaller package tends to be helpful, even if it loses capacitance under DC bias.)

    These glitches come from the power supply line, and are caused by the current spikes that happen during the switching of the internal circuitry. B8 is the farthest away from VCCB, so this pin is where the decoupling has the smallest influence.

    A more modern device like the SN74LXC8T245 uses less current during switching and might help.

  • Thank you for letting me know the cause.

    We'll try using modern devices.