Hello Emrys-san,
I received an additional question from the customer.
The IBIS model shows the voltage and current at pull-up and pull-down, could the output impedance be calculated from these characteristics?
Regards,
Masa
Hello Emrys-san,
I received an additional question from the customer.
The IBIS model shows the voltage and current at pull-up and pull-down, could the output impedance be calculated from these characteristics?
Regards,
Masa
Hello Masa-san,
Please post new questions in a new thread so they can be appropriate addressed and tracked. You can link to the original thread for context if necessary. I have split this question to a new thread and updated the title to match.
Original thread: https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1179983/sn74lvc16245a-pspice-model
-
The IBIS model can be interpreted by an IBIS simulator to provide excellent signal integrity, but I do not know a way to use the values in the model to back-calculate impedance.
We can take a shot at it by just using the ratio of the values provided, R = V/I -- at 1.8-V supply, the device enters saturation at around 1V, so any values above that are not extremely helpful (the device is acting more like a current source than a resistor in that case). Eliminating negative values and those above 1.3V provides this:
Realistically, the minimum resistance is what is important for impedance matching (assuming that is why they want to go to all this trouble). The values above show 9 ohm min, 14 ohm typ, 21 ohm max.
Is that accurate? No, it is not.
From the datasheet:
Using those values, R_OH(max) = (1.65-1.2)/0.004 = 112.5 ohms, R_OL(max) = 0.45/0.004 = 112.5 ohms
Typical values are around half of the max (56 ohms) - these can easily be measured on a real device by either applying a small voltage and measuring the resulting current, or forcing a current and measuring the output voltage.
