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damaged buffer SN74LVC244ADB

Elena Faventi
Prodigy 50 points
Other Parts Discussed in Thread: SN74LVC244A, SN74HCS244

We often use buffers like SN74LVC244A in our boards, especially if we need to interface different boards together with a common bus.

You can look at the sketch below to understand our electrical connection.

 

We know that SN74LVC244A supports Live Insertion, it has the Ioff parameter and performs a partial power down.

We’ve never seen problems for years but now, in a specific equipment, 3 buffers have been damaged. The 3 components are mounted on 3 different boards, connected together with a common bus.

As a consequence, we’ve taken some tests to better understand the behaviour of power supplies and IOs

We believe that one possible damaging cause could be ESD, but after we read better the data sheet some doubts came to us up.

We’ve read something in the TI forum:

e2e.ti.com/.../sn74lvc244a-random-failure-of-pins-with-resistance-ranging-from-0-5-ohm-to-15-ohm-to-ground-primary-or-secondary-side

https://www.ti.com/lit/an/scba004e/scba004e.pdf?ts=1674562925452

We’ve noticed a special strict requirement in the data sheet about rise and fall time specifications.

Our concern is for what’s going on when VIN power supply falls down, because if the different boards switch their power supplies off at different time points (because of their slighty different thresholds), we actually see an intermedium voltage on the inputs when the SN74LVC244A is still powered (an intermedium level due to a partition among pull-up to 3.3V and pull-“down” on the already unpowered boards).

We’ve noticed that this event happened in the equipment in which 3 ICs SN74LVC244A have broken, and therefore we guess this could  be the cause.

Anyway, we tried to damage deliberately another chip but we haven’t been able to see the same damage.

From your point of  view has our circuit some critical issues?

Maybe should we use a different family of buffer in our bus implementation? (like HC HCT, that don’t seem to have this timing restriction?)

Thank you in advance for some help

 

 

  • 0
    Guru 316690 points

    The most likely cause of damage is overvoltage, especially if multiple devices connected to the same bus have failed. LVC inputs have no positive clamping diodes, so if you expect overvoltage, you should add external ones.

    What exaclty is damaged? Inputs or outputs?

    All CMOS devices without Schmitt-trigger inputs (including HC) have timing restrictions.

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    We don't have overvoltages, the maximum voltage we have on the bus is +3.3V, due to the fact that every board has a 10kOhm pull-up on its input pin #11. The boards switch off one by one and the input voltage can take the waveform shown above (yellow line). One time the input pin 11 got damaged (it had a low level) and other two times, we found the output pin 9 tied to a low voltage with the input pin 11 still "working" (tied neither to '1' nor to '0' from the chip inside).

    Thank you very much

  • 0 in reply to Elena Faventi
    Guru 316690 points

    The overvoltage might have come from somewhere else, e.g., ESD.

    When doing live insertion, it is plausible that some line got touched, or that the (un)plugging generated noise.
    Are there any protection components on the bus lines?

    When the output pin 9 was low, did the connection also exist when the device is powered off/unsoldered? If not, then it is likely that the corresponding input was damaged, but without a visible short at that pin.

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    Thank you.

    We don't do a live insertion, we insert all the cards and after that, we power-up/down the full system with an external 12V. The peculiarity of this  test bench is that the external 12V rises quickly and falls very slowly. Due to the slightly different thresholds in the local DCDC converters, the boards switch off one by one and the input voltage of 74LVC244A can take the waveform shown above. In this case, some boards, that are already ON, have the 74LVCC244A inputs that slowly switch from 1 to 0. Luckily we have this specific power supply in a single implementation.

    Yes, unsoldering the chip, the connection to its pin 9 on the board was restored. As you say, it is likely that the corresponding input was damaged, but without a visible short at that pin.

    We thought il might be a relationship between this kind of damage and our power off timings, because this failure has occurred only in this specific implementation.

    What do you recommend?

    Maybe, we should use ICs with Schmitt-trigger inputs and protect our input from ESD.

    There are some kinds of logic that could help us to be more tolerant to a slow rise/fall time? HC seems to be more tolerant for example.

    Thank you very much for your advice and time.

  • +1 in reply to Elena Faventi
    Guru 316690 points

    I doubt that your damage is caused by slow edges.

    Anyway, to be able to handle arbitrarily slow edges, use a device with Schmitt-trigger inputs, e.g., SN74HCS244. It does not have Ioff, has less drive strength than LVC, and it does not allow input voltages above its own supply (unless you have a series resistor to limit the current to less than 20 mA).

  • +1 in reply to Clemens Ladisch
    TI__Guru* 97046 points
    Clemens Ladisch said:
    I doubt that your damage is caused by slow edges.

    It is very rare, but I have seen some devices get damaged from only a slow input edge. The LVC family is most susceptible to damage from slow inputs when operating at higher voltage (3.3V).

  • 0 in reply to Clemens Ladisch
    Prodigy 50 points

    You have been very helpful. Thank you very much