Is it ok to have nOE and Dir pulled to +5V when in the powered down state ? i.e., before Vcca comes up to 1.8V ? When 1.8V is good then nOE will be pulled below Vt- to take the buffers out of Hi-Z.
I note that the SN74LXC8T245 device has 5V tolerant inputs and both nOE and Dir can have up to 5.5V on them according to the recommended operating conditions so I myself cannot see any issue in doing this.
Please confirm that the part is tolerant of this.