Hi,team
Please tell me the following points about the VOL in the LSF0102 data sheet.
【question 1】
In 9.2.1.2.2 Pullup Resistor Sizing in the datasheet below,"15 mA only applies to the current flowing through the LSF family device,
but the external driver draws total current from the resistors on either side of his LSF family device. It must be able to sink at 0.175V."
There was an explanation.
I'm thinking of using an FPGA as the connection for the LSF0102.
When checking the DC characteristics of the FPGA, it says that VOL=0.45[V] is guaranteed at IOL=±4mA.
The above VOL=0.175[V] is not satisfied.
However, when checking 「Voltage-Level Translation With the LSF Family (slva675b)」,
"When the input side exceeds VREF_A-0.5V, the FET turns OFF, the pull-up voltage of the B side output voltage is seen,
and the input signal Below Vref_A–0.5 V, the LSF device acts as a passive switch and the input signal passes through the switch unaltered.”
There was a description.
Voltage-Level Translation With the LSF Family (Rev. B)
If the input side drops below VREF_A - 0.5V, the input signal can pass through the switch,so if VOL ≤ VREF - 0.5V, is there no problem?
Or is it always necessary to satisfy VOL=0.175[V]?
【Question 2】
Table 9-3. Pull-up Resistor Values had settings of 8mA, 5mA, and 3mA.
Is it possible to change the value of the pull-up resistor and use it at 3mA or less (1.5mA, etc.)?
"Also, if possible, how many mA can be set?"
