We have a laser trigger pulse which has 250mV amplitude and 2 ns pulse width. We would like to seek a simple solution to shape the laser pulse to 3.3 LVCMOS level and at least 30ns pulse width. Any recommendation would be appreciated.
Thanks,
Jimmy
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We have a laser trigger pulse which has 250mV amplitude and 2 ns pulse width. We would like to seek a simple solution to shape the laser pulse to 3.3 LVCMOS level and at least 30ns pulse width. Any recommendation would be appreciated.
Thanks,
Jimmy
250 mV is too low for any logic device. (It might be possible to carefully bias the SN74AUC1GU04, but there is no guarantee.)
You could use a fast comparator like the TLV3601. To implement a delay for the falling edge, use an R-C circuit with a diode; you have to adjust the R/C values according to the desired delay and the actual switching thresholds of the buffer:
