This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TXB0304: Logic forum

Other Parts Discussed in Thread: TXB0304

Hi team,

is there any level shifter recomendation for the Quad-SPI application?

Reqiurment:

Max Clock: 100Mhz

1.8V to 3.3V/ auto-bi-directional

and Host CPU SPI spec TCLH  (clock high time)/ TCLL (clock low time) Min is 3.9ns,

so need low propagation delay for better setup time margin, please note it.

BTW, we find the TXB0304 "Data rate" (max) (MBps) is 140, so it can suppot the max "clock" 100Mhz as well?

please help to clarify it.

Thanks