If the LSFs “B” port is facing the outside world and there is no power on the Enable, Vref_A and Vref_B pins, e.g. the device is powered down, what is the expected leakage of the “B” pin if there is +3.3 or +5 VDC on the pin?
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If the LSFs “B” port is facing the outside world and there is no power on the Enable, Vref_A and Vref_B pins, e.g. the device is powered down, what is the expected leakage of the “B” pin if there is +3.3 or +5 VDC on the pin?
Thanks Emrys,
Are we sure this is the leakage even with Vref both at 0V? Just want to make sure since the test condition wasn't started and would figure its tested with Vref applied.
Hey Bob,
There's no spec for that, so there's no guarantees, but the spec is positive only, indicating that the leakage is only going to ground and not to any supplies. Of course, that's probably because they only specified it with V_I = 5V.
The translation team may have more insight, but for system design, I would treat it is +/- 5uA max. For practical (typical) purposes, it's probably more like +/- 100nA max.