Hi ,
I can't find the High-Level Input Current and Low-Level Input Current range of the SN74LVC1G11DCKR IC in the datasheet. Please help.
Thanks, regards,
Anoop Varma m
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Hi ,
I can't find the High-Level Input Current and Low-Level Input Current range of the SN74LVC1G11DCKR IC in the datasheet. Please help.
Thanks, regards,
Anoop Varma m
Thanks for the replay,
We have connected an AND(SN74LVC1G11) gate output to the input of the 16 parallel AND(SN74LVC1G11) gate. So how do calculate fan out(based on capacitance).?
The input capacitance is about 3.5 pF. The propagation delay at 3.3 V or 5 V supplies is specified for a load of 50 pF, which corresponds to about 14 gates. Using 16 gates (and the additional trace capacitance of roughly 1 pF/cm) will makes the edges slightly slower than specified.