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TXU0304: internal pull low resister

Part Number: TXU0304

Hi Team,

when the SPI slave_2 output is floating, the SPI slave_1 output is still low, 

in the SPEC of TXU0304 , it is seen that internal a weak pull low of 5Mohm.

 1. is the situation we understand reasonable?

2. is this problem affect by level shift IC and is it low?

3. for us application, is there any suggest way to make the SPI slave_2 output floating and the TXU0304 output not to be low?

thanks for help and learn from you

  • While the OE input is high, all outputs are active, and output a signal (either high or low).

    The MISO signal has three states. To be able to combine the two signals, you need to insert a three-state buffer (i.e., SN74xxx1G125) after the A4Y pin; its /OE can be controlled by slave2's chip select signal.