While communicating through the level translator one bit of both MISO and MOSI lines were missing


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While communicating through the level translator one bit of both MISO and MOSI lines were missing


Hi Aswin,
I presume you are asking for a schematic review. However, I do not see any immediate concerns with the AXC schematic other than the OE configuration.
If more feedback is needed, please help clarify what is meant by the data lines missing, i.e do you see low when expecting a high? If so, do the AXC inputs observe a high while the outputs observe a low? Or the inputs and outputs both observe a low?
Please further provide waveforms while ensuring OE is actually set to low so as to enable the device as it does seem to pulled high i.e disabling the I/O ports, thanks.
Best Regards,
Michael.