SN74LVC8T245: Logic forum

Section 4.4 of QFN and SON PCB Attachment says:

The proposed stencil design enables out-gassing of the solder paste during reflow and also regulates the finished solder thickness. Typically, the solder-paste coverage is approximately 50% to 70% of the pad area (see Figure 4-3). Designing an aperture that prints solder 1:1 with the exposed pad results in excessive metal volume that can "float" the part and cause opens and other manufacturing defects. In addition, the amount of voiding post reflow in the thermal pad solder joint should not exceed 50% in high-power applications (to be verified using an x-ray). Based on a JEDEC High K board stackup, 25% has been determined to be a point of diminishing thermal performance returns, but TI prefers a limit of 50% to be set (reference JESD51-7).

The example is just an example; when in doubt, speak with your board manufacturer.