SN74LVC1G00: NAND SR latch and protection logic

Hello,

hoping to get some input on my design,

I want to latch some LM339 comparator output (active low)  for overcurrent and ground fault, and i wish to reset with an MCU.

Output enable is active low for buffer IC to pulldown 3.3v with 10k resistor.

1.  does the uC reset scheme make sense? is it ok to pull down an MCU pin for a reset pulse into logic gate?
2.  Is my final logic sound?

all nand gates have 100nF decoupling.

Cheers.