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Original question:

SN74LV1T125: Logic forum

SN74LV1T125: output is LOW when buffer is disabled

Kranky
Prodigy 10 points
Part Number: SN74LV1T125

Hi,

I have a pretty straight forward circuit at hand. I am using 1 input AND gate and it's output is fed to buffer with active LOW enable.

  • The circuit is working fine for the case when buffer is enabled ( buffer output is transparent), but
  • the cirucit does not work when buffer is disabled. (Buffer output should be HIGH via pull up but is LOW instead)

PFB spice + sim

BR,

  • 0
    TI__Mastermind 33765 points

    Hi Kranky,

    I presume the sim provided is for when device is enabled. 
    However, note that the output is specified for Hi-Z when disabled and not High - similar to section 8.4 function table per the data sheet.

    Hence, will recommend stronger pull-ups, thanks. 

    Best Regards,

    Michael. 

  • 0 in reply to Michael Ikwuyum
    Prodigy 10 points

    Hi Michael,

    I have simulated both for enable and disabled case (FW_RDY_N) LOW and HIGH.

    you are right when disabled, output should be Hi-Z. This is why I used 1k pull to ideal 5V. I expected a HIGH on output (BUFF_OUT) but instead i see a LOW even with the pull-up.

    BR,

    Kranky

  • 0 in reply to Kranky
    TI__Mastermind 33765 points

    Hi Kranky,

    You see a LOW most likely due to the Hi-Z current being higher than the 5 V / 1K current and would recommend 500 ohms while adjusting accordingly, thanks.

    Best Regards,

    Michael.