TXB0104-Q1: Output Load Considerations

shihui xu

Part Number: TXB0104-Q1

Tool/software:

chapter 8.3.3 Output Load Considerations says : " PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay on for approximately 10 ns."

What does it mean by "The O.S. circuits have been designed to stay on for approximately 10 ns"? Does it mean that this circuit only works periodically, and is it also possible that short pulses cannot be monitored?

Please explain how the one-shot circuit works to help me better understand this constraint.

Thank you.

3 months ago

0 Clemens Ladisch 3 months ago

Guru 272510 points

Then one-shot triggers for every rising or falling edge detected at the input. But it stays on only for a short time, so if the capacitance or inductance at the output is too high, the output voltage will not have reached VCC or GND.

0 shihui xu 3 months ago in reply to Clemens Ladisch

Prodigy 60 points

I can understand it from the "load" perspective. But can you explain how the reflection associate with one-shot: PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration.

0 Clemens Ladisch 3 months ago in reply to shihui xu

Guru 272510 points

The one-shot is a very strong driver and can override the voltage spike of the reflection. If the reflection arrives later, it cannot be suppressed.

+1 Jack Guan 3 months ago

TI__Mastermind 23651 points

Hey Shihui,

Once the one-shot is deactivated, the return signal will see a different impedance (4kohms) instead of the O.S impedance. You may see Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters for more info.

Regards,

Jack

Logic

Logic forum

TXB0104-Q1: Output Load Considerations